From patchwork Mon Oct 8 17:44:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot,10/28] powerpc/e6500: Move QCSP registers for QMan v3 Date: Mon, 08 Oct 2012 07:44:13 -0000 From: York Sun X-Patchwork-Id: 190071 Message-Id: <1349718271-26503-10-git-send-email-yorksun@freescale.com> To: Cc: afleming@freescale.com The QCSP registers are expanded and moved from offset 0 to offset 0x1000 for SoCs with QMan v3. Signed-off-by: York Sun --- arch/powerpc/include/asm/immap_85xx.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 1b1db16..de59ccf 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2535,13 +2535,16 @@ typedef struct ccsr_sec { #endif typedef struct ccsr_qman { +#ifdef CONFIG_SYS_FSL_QMAN_V3 + u8 res0[0x200]; +#else struct { u32 qcsp_lio_cfg; /* 0x0 - SW Portal n LIO cfg */ u32 qcsp_io_cfg; /* 0x4 - SW Portal n IO cfg */ u32 res; u32 qcsp_dd_cfg; /* 0xc - SW Portal n Dynamic Debug cfg */ } qcsp[32]; - +#endif /* Not actually reserved, but irrelevant to u-boot */ u8 res[0xbf8 - 0x200]; u32 ip_rev_1; @@ -2566,6 +2569,14 @@ typedef struct ccsr_qman { u32 ci_rlm_cfg; /* Initiator Read Latency Monitor Cfg */ u32 ci_rlm_avg; /* Initiator Read Latency Monitor Avg */ u8 res7[0x2e8]; +#ifdef CONFIG_SYS_FSL_QMAN_V3 + struct { + u32 qcsp_lio_cfg; /* 0x0 - SW Portal n LIO cfg */ + u32 qcsp_io_cfg; /* 0x4 - SW Portal n IO cfg */ + u32 res; + u32 qcsp_dd_cfg; /* 0xc - SW Portal n Dynamic Debug cfg*/ + } qcsp[50]; +#endif } ccsr_qman_t; typedef struct ccsr_bman {