Patchwork [U-Boot,v2] tegra: nand: make ONFI detection work

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Submitter Lucas Stach
Date Oct. 7, 2012, 9:29 p.m.
Message ID <1349645378-21160-1-git-send-email-dev@lynxeye.de>
Download mbox | patch
Permalink /patch/189865/
State Accepted
Delegated to: Tom Warren
Headers show

Comments

Lucas Stach - Oct. 7, 2012, 9:29 p.m.
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.

Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
v2: use puts instead of printf
---
 drivers/mtd/nand/tegra_nand.c    | 36 ++++++++++++++++++++++++++++++++++++
 include/configs/tegra20-common.h |  1 +
 2 Dateien geändert, 37 Zeilen hinzugefügt(+)
Lucas Stach - Oct. 14, 2012, 3:32 p.m.
Scott, can I have your Acked-by for this, so Tom can take it through the
Tegra tree?

Thanks,
Lucas

Am Sonntag, den 07.10.2012, 23:29 +0200 schrieb Lucas Stach:
> Add the missing bits to the Tegra NAND driver to make ONFI detection work
> properly.
> 
> Also add it to the Tegra default config, as it seems to be a reasonable thing
> to have it available on all boards that use any kind of NAND.
> 
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> ---
> v2: use puts instead of printf
> ---
>  drivers/mtd/nand/tegra_nand.c    | 36 ++++++++++++++++++++++++++++++++++++
>  include/configs/tegra20-common.h |  1 +
>  2 Dateien geändert, 37 Zeilen hinzugefügt(+)
> 
> diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c
> index 5408c51..4d94cc6 100644
> --- a/drivers/mtd/nand/tegra_nand.c
> +++ b/drivers/mtd/nand/tegra_nand.c
> @@ -219,6 +219,34 @@ static uint8_t read_byte(struct mtd_info *mtd)
>  }
>  
>  /**
> + * Read len bytes from the chip into a buffer
> + *
> + * @param mtd	MTD device structure
> + * @param buf	buffer to store data to
> + * @param len	number of bytes to read
> + *
> + * Read function for 8bit bus-width
> + */
> +static void read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
> +{
> +	int i, s;
> +	unsigned int reg;
> +	struct nand_chip *chip = mtd->priv;
> +	struct nand_drv *info = (struct nand_drv *)chip->priv;
> +
> +	for (i = 0; i < len; i += 4) {
> +		s = (len - i) > 4 ? 4 : len - i;
> +		writel(CMD_PIO | CMD_RX | CMD_A_VALID | CMD_CE0 |
> +			((s - 1) << CMD_TRANS_SIZE_SHIFT) | CMD_GO,
> +			&info->reg->command);
> +		if (!nand_waitfor_cmd_completion(info->reg))
> +			puts("Command timeout during read_buf\n");
> +		reg = readl(&info->reg->resp);
> +		memcpy(buf + i, &reg, s);
> +	}
> +}
> +
> +/**
>   * Check NAND status to see if it is ready or not
>   *
>   * @param mtd	MTD device structure
> @@ -317,6 +345,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
>  	switch (command) {
>  	case NAND_CMD_READID:
>  		writel(NAND_CMD_READID, &info->reg->cmd_reg1);
> +		writel(column & 0xFF, &info->reg->addr_reg1);
>  		writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_PIO
>  			| CMD_RX |
>  			((4 - 1) << CMD_TRANS_SIZE_SHIFT)
> @@ -324,6 +353,12 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
>  			&info->reg->command);
>  		info->pio_byte_index = 0;
>  		break;
> +	case NAND_CMD_PARAM:
> +		writel(NAND_CMD_PARAM, &info->reg->cmd_reg1);
> +		writel(column & 0xFF, &info->reg->addr_reg1);
> +		writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_CE0,
> +			&info->reg->command);
> +		break;
>  	case NAND_CMD_READ0:
>  		writel(NAND_CMD_READ0, &info->reg->cmd_reg1);
>  		writel(NAND_CMD_READSTART, &info->reg->cmd_reg2);
> @@ -976,6 +1011,7 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
>  	nand->options = LP_OPTIONS;
>  	nand->cmdfunc = nand_command;
>  	nand->read_byte = read_byte;
> +	nand->read_buf = read_buf;
>  	nand->ecc.read_page = nand_read_page_hwecc;
>  	nand->ecc.write_page = nand_write_page_hwecc;
>  	nand->ecc.read_page_raw = nand_read_page_raw;
> diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
> index 744dc59..9e60020 100644
> --- a/include/configs/tegra20-common.h
> +++ b/include/configs/tegra20-common.h
> @@ -204,5 +204,6 @@
>  #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/tegra20/u-boot-spl.lds"
>  
>  #define CONFIG_SYS_NAND_SELF_INIT
> +#define CONFIG_SYS_NAND_ONFI_DETECTION
>  
>  #endif /* __TEGRA20_COMMON_H */
Scott Wood - Oct. 15, 2012, 8:05 p.m.
On 10/14/2012 10:32:52 AM, Lucas Stach wrote:
> Scott, can I have your Acked-by for this, so Tom can take it through  
> the
> Tegra tree?
> 
> Thanks,
> Lucas
> 
> Am Sonntag, den 07.10.2012, 23:29 +0200 schrieb Lucas Stach:
> > Add the missing bits to the Tegra NAND driver to make ONFI  
> detection work
> > properly.
> >
> > Also add it to the Tegra default config, as it seems to be a  
> reasonable thing
> > to have it available on all boards that use any kind of NAND.
> >
> > Signed-off-by: Lucas Stach <dev@lynxeye.de>
> > ---
> > v2: use puts instead of printf
> > ---
> >  drivers/mtd/nand/tegra_nand.c    | 36  
> ++++++++++++++++++++++++++++++++++++
> >  include/configs/tegra20-common.h |  1 +
> >  2 Dateien geändert, 37 Zeilen hinzugefügt(+)

Acked-by: Scott Wood <scottwood@freescale.com>

-Scott

Patch

diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c
index 5408c51..4d94cc6 100644
--- a/drivers/mtd/nand/tegra_nand.c
+++ b/drivers/mtd/nand/tegra_nand.c
@@ -219,6 +219,34 @@  static uint8_t read_byte(struct mtd_info *mtd)
 }
 
 /**
+ * Read len bytes from the chip into a buffer
+ *
+ * @param mtd	MTD device structure
+ * @param buf	buffer to store data to
+ * @param len	number of bytes to read
+ *
+ * Read function for 8bit bus-width
+ */
+static void read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	int i, s;
+	unsigned int reg;
+	struct nand_chip *chip = mtd->priv;
+	struct nand_drv *info = (struct nand_drv *)chip->priv;
+
+	for (i = 0; i < len; i += 4) {
+		s = (len - i) > 4 ? 4 : len - i;
+		writel(CMD_PIO | CMD_RX | CMD_A_VALID | CMD_CE0 |
+			((s - 1) << CMD_TRANS_SIZE_SHIFT) | CMD_GO,
+			&info->reg->command);
+		if (!nand_waitfor_cmd_completion(info->reg))
+			puts("Command timeout during read_buf\n");
+		reg = readl(&info->reg->resp);
+		memcpy(buf + i, &reg, s);
+	}
+}
+
+/**
  * Check NAND status to see if it is ready or not
  *
  * @param mtd	MTD device structure
@@ -317,6 +345,7 @@  static void nand_command(struct mtd_info *mtd, unsigned int command,
 	switch (command) {
 	case NAND_CMD_READID:
 		writel(NAND_CMD_READID, &info->reg->cmd_reg1);
+		writel(column & 0xFF, &info->reg->addr_reg1);
 		writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_PIO
 			| CMD_RX |
 			((4 - 1) << CMD_TRANS_SIZE_SHIFT)
@@ -324,6 +353,12 @@  static void nand_command(struct mtd_info *mtd, unsigned int command,
 			&info->reg->command);
 		info->pio_byte_index = 0;
 		break;
+	case NAND_CMD_PARAM:
+		writel(NAND_CMD_PARAM, &info->reg->cmd_reg1);
+		writel(column & 0xFF, &info->reg->addr_reg1);
+		writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_CE0,
+			&info->reg->command);
+		break;
 	case NAND_CMD_READ0:
 		writel(NAND_CMD_READ0, &info->reg->cmd_reg1);
 		writel(NAND_CMD_READSTART, &info->reg->cmd_reg2);
@@ -976,6 +1011,7 @@  int tegra_nand_init(struct nand_chip *nand, int devnum)
 	nand->options = LP_OPTIONS;
 	nand->cmdfunc = nand_command;
 	nand->read_byte = read_byte;
+	nand->read_buf = read_buf;
 	nand->ecc.read_page = nand_read_page_hwecc;
 	nand->ecc.write_page = nand_write_page_hwecc;
 	nand->ecc.read_page_raw = nand_read_page_raw;
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 744dc59..9e60020 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -204,5 +204,6 @@ 
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/tegra20/u-boot-spl.lds"
 
 #define CONFIG_SYS_NAND_SELF_INIT
+#define CONFIG_SYS_NAND_ONFI_DETECTION
 
 #endif /* __TEGRA20_COMMON_H */