From patchwork Sat Oct 6 12:30:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 189694 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B6D892C018B for ; Sat, 6 Oct 2012 23:08:03 +1000 (EST) Received: from localhost ([::1]:36776 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKTXF-0005d8-BW for incoming@patchwork.ozlabs.org; Sat, 06 Oct 2012 08:31:13 -0400 Received: from eggs.gnu.org ([208.118.235.92]:49671) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKTWd-00047u-Ln for qemu-devel@nongnu.org; Sat, 06 Oct 2012 08:30:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TKTWb-0000A1-J4 for qemu-devel@nongnu.org; Sat, 06 Oct 2012 08:30:35 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:61635) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKTWb-00008K-8a for qemu-devel@nongnu.org; Sat, 06 Oct 2012 08:30:33 -0400 Received: by mail-wi0-f181.google.com with SMTP id hq12so1308717wib.10 for ; Sat, 06 Oct 2012 05:30:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; bh=AcVmmnFGYFABCxS8YDLfJgD2S0TbdEj2U4rWVz+BmOg=; b=ehVCa8hKrsJaSnGBicpYooTVB9MEhCilGldfnRh+1pV3ZBas4t2J4jRsIamNO7j7gw DHDa9wIGO1BAZ9CvH6ZD8YVKNHudsQIi3y3hG5xe6PmV/j94IvsogyX9Q/9J83ai8Kyt biaGYYQ7gk5rRP4OQe4BOhbh1ygqT0pNlsdRJvW4n1fchFHiuJa86euvMVBKxmtpmrnM n7AtEf3CHKQojk0no+0ckOkmWzl5aOmS8QCLZ6RHbrxPIp/TIpB7wkOmreMoZaa4KIII 5BZdkS+/weaO/qEP7j1LyKUVsZLJ7LCLAaRUPQf4gN1BI5l9ba6BrdymohYuR+WtamAp 2iVw== Received: by 10.180.76.69 with SMTP id i5mr9346535wiw.9.1349526632078; Sat, 06 Oct 2012 05:30:32 -0700 (PDT) Received: from yakj.lan (93-34-169-1.ip50.fastwebnet.it. [93.34.169.1]) by mx.google.com with ESMTPS id m14sm7950701wie.8.2012.10.06.05.30.31 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 06 Oct 2012 05:30:31 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Sat, 6 Oct 2012 14:30:11 +0200 Message-Id: <1349526621-13939-5-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.7.12.1 In-Reply-To: <1349526621-13939-1-git-send-email-pbonzini@redhat.com> References: <1349526621-13939-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.212.181 Subject: [Qemu-devel] [PATCH 04/14] i386: drop cc_op argument of gen_jcc1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org As in the gen_repz_scas/gen_repz_cmps case, delay setting CC_OP_DYNAMIC in gen_jcc until after code generation. All of gen_jcc1/is_fast_jcc/gen_setcc_slow_T0 now work on s->cc_op, which makes things a bit easier to follow and to patch. Signed-off-by: Paolo Bonzini Reviewed-by: Richard Henderson --- target-i386/translate.c | 33 ++++++++++++++++++--------------- 1 file modificato, 18 inserzioni(+), 15 rimozioni(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 0297b9a..38f62eb 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -944,7 +944,7 @@ static int is_fast_jcc_case(DisasContext *s, int b) /* generate a conditional jump to label 'l1' according to jump opcode value 'b'. In the fast case, T0 is guaranted not to be used. */ -static inline void gen_jcc1(DisasContext *s, int cc_op, int b, int l1) +static inline void gen_jcc1(DisasContext *s, int b, int l1) { int inv, jcc_op, size, cond; TCGv t0; @@ -952,14 +952,14 @@ static inline void gen_jcc1(DisasContext *s, int cc_op, int b, int l1) inv = b & 1; jcc_op = (b >> 1) & 7; - switch(cc_op) { + switch(s->cc_op) { /* we optimize the cmp/jcc case */ case CC_OP_SUBB: case CC_OP_SUBW: case CC_OP_SUBL: case CC_OP_SUBQ: - size = cc_op - CC_OP_SUBB; + size = s->cc_op - CC_OP_SUBB; switch(jcc_op) { case JCC_Z: fast_jcc_z: @@ -1043,10 +1043,10 @@ static inline void gen_jcc1(DisasContext *s, int cc_op, int b, int l1) case CC_OP_SARQ: switch(jcc_op) { case JCC_Z: - size = (cc_op - CC_OP_ADDB) & 3; + size = (s->cc_op - CC_OP_ADDB) & 3; goto fast_jcc_z; case JCC_S: - size = (cc_op - CC_OP_ADDB) & 3; + size = (s->cc_op - CC_OP_ADDB) & 3; goto fast_jcc_s; default: goto slow_jcc; @@ -1187,7 +1187,7 @@ static inline void gen_repz_ ## op(DisasContext *s, int ot, \ gen_ ## op(s, ot); \ gen_op_add_reg_im(s->aflag, R_ECX, -1); \ gen_op_set_cc_op(s->cc_op); \ - gen_jcc1(s, s->cc_op, (JCC_Z << 1) | (nz ^ 1), l2); \ + gen_jcc1(s, (JCC_Z << 1) | (nz ^ 1), l2); \ if (!s->jmp_opt) \ gen_op_jz_ecx(s->aflag, l2); \ gen_jmp(s, cur_eip); \ @@ -2291,13 +2291,15 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num, target_ulong eip) static inline void gen_jcc(DisasContext *s, int b, target_ulong val, target_ulong next_eip) { - int l1, l2, cc_op; + int l1, l2; - cc_op = s->cc_op; - gen_update_cc_op(s); + if (s->cc_op != CC_OP_DYNAMIC) { + gen_op_set_cc_op(s->cc_op); + } if (s->jmp_opt) { l1 = gen_new_label(); - gen_jcc1(s, cc_op, b, l1); + gen_jcc1(s, b, l1); + s->cc_op = CC_OP_DYNAMIC; gen_goto_tb(s, 0, next_eip); @@ -2308,7 +2310,8 @@ static inline void gen_jcc(DisasContext *s, int b, l1 = gen_new_label(); l2 = gen_new_label(); - gen_jcc1(s, cc_op, b, l1); + gen_jcc1(s, b, l1); + s->cc_op = CC_OP_DYNAMIC; gen_jmp_im(next_eip); tcg_gen_br(l2); @@ -2331,7 +2334,7 @@ static void gen_setcc(DisasContext *s, int b) t0 = tcg_temp_local_new(); tcg_gen_movi_tl(t0, 0); l1 = gen_new_label(); - gen_jcc1(s, s->cc_op, b ^ 1, l1); + gen_jcc1(s, b ^ 1, l1); tcg_gen_movi_tl(t0, 1); gen_set_label(l1); tcg_gen_mov_tl(cpu_T[0], t0); @@ -6013,7 +6016,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) }; op1 = fcmov_cc[op & 3] | (((op >> 3) & 1) ^ 1); l1 = gen_new_label(); - gen_jcc1(s, s->cc_op, op1, l1); + gen_jcc1(s, op1, l1); gen_helper_fmov_ST0_STN(cpu_env, tcg_const_i32(opreg)); gen_set_label(l1); } @@ -6404,7 +6407,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (ot == OT_LONG) { /* XXX: specific Intel behaviour ? */ l1 = gen_new_label(); - gen_jcc1(s, s->cc_op, b ^ 1, l1); + gen_jcc1(s, b ^ 1, l1); tcg_gen_mov_tl(cpu_regs[reg], t0); gen_set_label(l1); tcg_gen_ext32u_tl(cpu_regs[reg], cpu_regs[reg]); @@ -6412,7 +6415,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) #endif { l1 = gen_new_label(); - gen_jcc1(s, s->cc_op, b ^ 1, l1); + gen_jcc1(s, b ^ 1, l1); gen_op_mov_reg_v(ot, reg, t0); gen_set_label(l1); }