Patchwork [07/14] i386: add helper functions to get other flags

login
register
mail settings
Submitter Paolo Bonzini
Date Oct. 6, 2012, 12:30 p.m.
Message ID <1349526621-13939-8-git-send-email-pbonzini@redhat.com>
Download mbox | patch
Permalink /patch/189691/
State New
Headers show

Comments

Paolo Bonzini - Oct. 6, 2012, 12:30 p.m.
Introduce new functions to extract PF, SF, OF, ZF in addition to CF.
These provide single entry points for optimizing accesses to a single
flag.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target-i386/translate.c | 48 ++++++++++++++++++++++++++++++++++++------------
 1 file modificato, 36 inserzioni(+), 12 rimozioni(-)
Blue Swirl - Oct. 7, 2012, 7:04 p.m.
On Sat, Oct 6, 2012 at 12:30 PM, Paolo Bonzini <pbonzini@redhat.com> wrote:
> Introduce new functions to extract PF, SF, OF, ZF in addition to CF.
> These provide single entry points for optimizing accesses to a single
> flag.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Reviewed-by: Blue Swirl <blauwirbel@gmail.com>

> ---
>  target-i386/translate.c | 48 ++++++++++++++++++++++++++++++++++++------------
>  1 file modificato, 36 inserzioni(+), 12 rimozioni(-)
>
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index df81b78..8f22119 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -847,21 +847,49 @@ static void gen_compute_eflags(DisasContext *s, TCGv reg)
>      tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
>  }
>
> +/* compute eflags.P to reg */
> +static void gen_compute_eflags_p(DisasContext *s, TCGv reg)
> +{
> +    gen_compute_eflags(s, reg);
> +    tcg_gen_shri_tl(reg, reg, 2);
> +    tcg_gen_andi_tl(reg, reg, 1);
> +}
> +
> +/* compute eflags.S to reg */
> +static void gen_compute_eflags_s(DisasContext *s, TCGv reg)
> +{
> +    gen_compute_eflags(s, reg);
> +    tcg_gen_shri_tl(reg, reg, 7);
> +    tcg_gen_andi_tl(reg, reg, 1);
> +}
> +
> +/* compute eflags.O to reg */
> +static void gen_compute_eflags_o(DisasContext *s, TCGv reg)
> +{
> +    gen_compute_eflags(s, reg);
> +    tcg_gen_shri_tl(reg, reg, 11);
> +    tcg_gen_andi_tl(reg, reg, 1);
> +}
> +
> +/* compute eflags.Z to reg */
> +static void gen_compute_eflags_z(DisasContext *s, TCGv reg)
> +{
> +    gen_compute_eflags(s, reg);
> +    tcg_gen_shri_tl(reg, reg, 6);
> +    tcg_gen_andi_tl(reg, reg, 1);
> +}
> +
>  static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
>  {
>      switch(jcc_op) {
>      case JCC_O:
> -        gen_compute_eflags(s, cpu_T[0]);
> -        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 11);
> -        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
> +        gen_compute_eflags_o(s, cpu_T[0]);
>          break;
>      case JCC_B:
>          gen_compute_eflags_c(s, cpu_T[0]);
>          break;
>      case JCC_Z:
> -        gen_compute_eflags(s, cpu_T[0]);
> -        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 6);
> -        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
> +        gen_compute_eflags_z(s, cpu_T[0]);
>          break;
>      case JCC_BE:
>          gen_compute_eflags(s, cpu_tmp0);
> @@ -870,14 +898,10 @@ static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
>          tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
>          break;
>      case JCC_S:
> -        gen_compute_eflags(s, cpu_T[0]);
> -        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 7);
> -        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
> +        gen_compute_eflags_s(s, cpu_T[0]);
>          break;
>      case JCC_P:
> -        gen_compute_eflags(s, cpu_T[0]);
> -        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 2);
> -        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
> +        gen_compute_eflags_p(s, cpu_T[0]);
>          break;
>      case JCC_L:
>          gen_compute_eflags(s, cpu_tmp0);
> --
> 1.7.12.1
>
>
>
Richard Henderson - Oct. 9, 2012, 7:04 p.m.
On 10/06/2012 05:30 AM, Paolo Bonzini wrote:
> Introduce new functions to extract PF, SF, OF, ZF in addition to CF.
> These provide single entry points for optimizing accesses to a single
> flag.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~

Patch

diff --git a/target-i386/translate.c b/target-i386/translate.c
index df81b78..8f22119 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -847,21 +847,49 @@  static void gen_compute_eflags(DisasContext *s, TCGv reg)
     tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
 }
 
+/* compute eflags.P to reg */
+static void gen_compute_eflags_p(DisasContext *s, TCGv reg)
+{
+    gen_compute_eflags(s, reg);
+    tcg_gen_shri_tl(reg, reg, 2);
+    tcg_gen_andi_tl(reg, reg, 1);
+}
+
+/* compute eflags.S to reg */
+static void gen_compute_eflags_s(DisasContext *s, TCGv reg)
+{
+    gen_compute_eflags(s, reg);
+    tcg_gen_shri_tl(reg, reg, 7);
+    tcg_gen_andi_tl(reg, reg, 1);
+}
+
+/* compute eflags.O to reg */
+static void gen_compute_eflags_o(DisasContext *s, TCGv reg)
+{
+    gen_compute_eflags(s, reg);
+    tcg_gen_shri_tl(reg, reg, 11);
+    tcg_gen_andi_tl(reg, reg, 1);
+}
+
+/* compute eflags.Z to reg */
+static void gen_compute_eflags_z(DisasContext *s, TCGv reg)
+{
+    gen_compute_eflags(s, reg);
+    tcg_gen_shri_tl(reg, reg, 6);
+    tcg_gen_andi_tl(reg, reg, 1);
+}
+
 static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
 {
     switch(jcc_op) {
     case JCC_O:
-        gen_compute_eflags(s, cpu_T[0]);
-        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 11);
-        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
+        gen_compute_eflags_o(s, cpu_T[0]);
         break;
     case JCC_B:
         gen_compute_eflags_c(s, cpu_T[0]);
         break;
     case JCC_Z:
-        gen_compute_eflags(s, cpu_T[0]);
-        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 6);
-        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
+        gen_compute_eflags_z(s, cpu_T[0]);
         break;
     case JCC_BE:
         gen_compute_eflags(s, cpu_tmp0);
@@ -870,14 +898,10 @@  static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
         tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
         break;
     case JCC_S:
-        gen_compute_eflags(s, cpu_T[0]);
-        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 7);
-        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
+        gen_compute_eflags_s(s, cpu_T[0]);
         break;
     case JCC_P:
-        gen_compute_eflags(s, cpu_T[0]);
-        tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 2);
-        tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
+        gen_compute_eflags_p(s, cpu_T[0]);
         break;
     case JCC_L:
         gen_compute_eflags(s, cpu_tmp0);