From patchwork Fri Oct 5 23:54:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 189648 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 202522C0328 for ; Sat, 6 Oct 2012 11:05:50 +1000 (EST) Received: from localhost ([::1]:39753 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKHkU-0000H3-Bj for incoming@patchwork.ozlabs.org; Fri, 05 Oct 2012 19:56:06 -0400 Received: from eggs.gnu.org ([208.118.235.92]:42570) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKHjs-0007DU-4I for qemu-devel@nongnu.org; Fri, 05 Oct 2012 19:55:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TKHjp-0003SX-Cn for qemu-devel@nongnu.org; Fri, 05 Oct 2012 19:55:27 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:49470) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKHjo-0003Pu-NO for qemu-devel@nongnu.org; Fri, 05 Oct 2012 19:55:25 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so2425530pbb.4 for ; Fri, 05 Oct 2012 16:55:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=MNYQz8hdWNzAqjC7UKUREIRkv4MlcdispM+F2f6pTSQ=; b=FzwuEZ+Pbs9FxISbCrAyRix8U0n6VJqi3ENuQT3mhDQ0zpwY51zbMB8clSyf3nu+rs bdm3C36PbkknebU0nyReZHDdIwzQJoqr62r8DNlizq9tdPYPoP5b+nMD+Iy5UURep++R 4ynFdz6SXSa2LpG97JHzQCkUQT/0SzDbfKIm2uyrQxke/W+6DsTBmhyT9wzfINh45Orj /Dm+JqqZ0J/sUhpJE5UFTuEBl7UY93lvit/BGO/V2wHr1GhL05+3WEQZpkohr4kSWBLB C+d0iHFau/1EXiQtTHMdhFcb0FsBvePjid/6Y7FLn5GuL7muPTkCabGjrLFV2atW9Wwz 985g== Received: by 10.68.134.99 with SMTP id pj3mr34418530pbb.13.1349481323665; Fri, 05 Oct 2012 16:55:23 -0700 (PDT) Received: from anchor.twiddle.home (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by mx.google.com with ESMTPS id tw5sm6751873pbc.48.2012.10.05.16.55.22 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 05 Oct 2012 16:55:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2012 16:54:54 -0700 Message-Id: <1349481310-9237-8-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1349481310-9237-1-git-send-email-rth@twiddle.net> References: <1349481310-9237-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 07/23] target-sparc: Tidy gen_mov_pc_npc interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson --- target-sparc/translate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index eb95260..d9e1b01 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -1147,10 +1147,10 @@ static inline void save_state(DisasContext *dc) save_npc(dc, cpu_cond); } -static inline void gen_mov_pc_npc(DisasContext *dc, TCGv cond) +static inline void gen_mov_pc_npc(DisasContext *dc) { if (dc->npc == JUMP_PC) { - gen_generic_branch(dc->jump_pc[0], dc->jump_pc[1], cond); + gen_generic_branch(dc->jump_pc[0], dc->jump_pc[1], cpu_cond); tcg_gen_mov_tl(cpu_pc, cpu_npc); dc->pc = DYNAMIC_PC; } else if (dc->npc == DYNAMIC_PC) { @@ -2499,7 +2499,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) gen_movl_TN_reg(15, r_const); tcg_temp_free(r_const); target += dc->pc; - gen_mov_pc_npc(dc, cpu_cond); + gen_mov_pc_npc(dc); #ifdef TARGET_SPARC64 if (unlikely(AM_CHECK(dc))) { target &= 0xffffffffULL; @@ -4573,7 +4573,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) tcg_gen_mov_tl(cpu_dst, cpu_src1); } gen_helper_restore(cpu_env); - gen_mov_pc_npc(dc, cpu_cond); + gen_mov_pc_npc(dc); r_const = tcg_const_i32(3); gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); @@ -4603,7 +4603,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) r_pc = tcg_const_tl(dc->pc); gen_movl_TN_reg(rd, r_pc); tcg_temp_free(r_pc); - gen_mov_pc_npc(dc, cpu_cond); + gen_mov_pc_npc(dc); r_const = tcg_const_i32(3); gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); @@ -4619,7 +4619,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) if (!supervisor(dc)) goto priv_insn; - gen_mov_pc_npc(dc, cpu_cond); + gen_mov_pc_npc(dc); r_const = tcg_const_i32(3); gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const);