From patchwork Fri Oct 5 02:36:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 189404 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6859F2C05BF for ; Fri, 5 Oct 2012 12:37:00 +1000 (EST) Received: from localhost ([::1]:46182 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJxmc-0001k9-JC for incoming@patchwork.ozlabs.org; Thu, 04 Oct 2012 22:36:58 -0400 Received: from eggs.gnu.org ([208.118.235.92]:46340) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJxmV-0001jw-5y for qemu-devel@nongnu.org; Thu, 04 Oct 2012 22:36:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TJxmT-0000bW-OH for qemu-devel@nongnu.org; Thu, 04 Oct 2012 22:36:51 -0400 Received: from cantor2.suse.de ([195.135.220.15]:36778 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJxmT-0000bK-I7; Thu, 04 Oct 2012 22:36:49 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 046C6A0FF6; Fri, 5 Oct 2012 04:36:48 +0200 (CEST) From: Alexander Graf To: qemu-devel qemu-devel Date: Fri, 5 Oct 2012 04:36:46 +0200 Message-Id: <1349404606-24057-1-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: "qemu-ppc@nongnu.org List" Subject: [Qemu-devel] [PATCH] PPC: KVM: Fix BAT put X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In the sregs API, upper and lower 32bit segments of the BAT registers are swapped when doing a set. Since we need to support old kernels out there, don't bother to fix it in the kernel, but instead work around the problem in QEMU by swapping on put. Signed-off-by: Alexander Graf --- target-ppc/kvm.c | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c index 1975323..93c5bb7 100644 --- a/target-ppc/kvm.c +++ b/target-ppc/kvm.c @@ -493,10 +493,11 @@ int kvm_arch_put_registers(CPUPPCState *env, int level) /* Sync BATs */ for (i = 0; i < 8; i++) { - sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[1][i] << 32) - | env->DBAT[0][i]; - sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[1][i] << 32) - | env->IBAT[0][i]; + /* Beware. We have to swap upper and lower bits here */ + sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32) + | env->DBAT[1][i]; + sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32) + | env->IBAT[1][i]; } ret = kvm_vcpu_ioctl(env, KVM_SET_SREGS, &sregs);