Patchwork [U-Boot,V3,22/32] mx6q_4x_mt41j128.cfg: force ZQ calibration

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Submitter Troy Kisky
Date Oct. 4, 2012, 1:47 a.m.
Message ID <1349315254-21151-23-git-send-email-troy.kisky@boundarydevices.com>
Download mbox | patch
Permalink /patch/188984/
State Changes Requested
Delegated to: Stefano Babic
Headers show

Comments

Troy Kisky - Oct. 4, 2012, 1:47 a.m.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
 board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Patch

diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
index 2d03ff7..9e20db0 100644
--- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
+++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
@@ -164,8 +164,8 @@  WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030)
 
 /* ZQ calibrate, CS0 */
 WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040)
-WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1380003)
-WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1380003)
+WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1390003)
+WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1390003)
 
 /* MDREF,  32KHz refresh, 4 refeshes each */
 WRITE_ENTRY1(MMDC_P0_MDREF, 0x00005800)