From patchwork Thu Oct 4 00:39:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot,9/9] x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE Date: Wed, 03 Oct 2012 14:39:28 -0000 From: Simon Glass X-Patchwork-Id: 188973 Message-Id: <1349311168-3524-10-git-send-email-sjg@chromium.org> To: U-Boot Mailing List Cc: Stefan Reinauer , Vadim Bendebury Coreboot boards have an LPC TPM connected, so enable this. We also need to skip the reset code. Signed-off-by: Simon Glass Acked-by: Gabe Black --- include/configs/coreboot.h | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 2c65d74..75db176 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -37,7 +37,7 @@ #define CONFIG_SYS_COREBOOT #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT - +#define CONFIG_NO_RESET_CODE /*----------------------------------------------------------------------- * Watchdog Configuration @@ -45,6 +45,10 @@ #undef CONFIG_WATCHDOG #undef CONFIG_HW_WATCHDOG +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 + /*----------------------------------------------------------------------- * Real Time Clock Configuration */