Patchwork [U-Boot,5/9] x86: coreboot: Move non-board specific files to coreboot arch directory

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Submitter Simon Glass
Date Oct. 4, 2012, 12:39 a.m.
Message ID <1349311168-3524-6-git-send-email-sjg@chromium.org>
Download mbox | patch
Permalink /patch/188972/
State Superseded, archived
Delegated to: Graeme Russ
Headers show

Comments

Simon Glass - Oct. 4, 2012, 12:39 a.m.
From: Stefan Reinauer <reinauer@chromium.org>

coreboot.c and coreboot_pci.c don't contain board specific but only
coreboot specific code. Hence move it to the coreboot directory in
arch/x86/cpu (which should probably be moved out of cpu/ in another
commit)

Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
---
 arch/x86/cpu/coreboot/Makefile                     |    2 ++
 .../x86/cpu}/coreboot/coreboot.c                   |    0
 .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c  |    0
 board/chromebook-x86/coreboot/Makefile             |    2 --
 4 files changed, 2 insertions(+), 2 deletions(-)
 rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
 rename board/chromebook-x86/coreboot/coreboot_pci.c => arch/x86/cpu/coreboot/pci.c (100%)
Gabe Black - Oct. 4, 2012, 1:11 a.m.
Acked-by: Gabe Black <gabeblack@chromium.org>
Graeme Russ - Oct. 4, 2012, 1:12 a.m.
Hi Simon,

On Thu, Oct 4, 2012 at 10:39 AM, Simon Glass <sjg@chromium.org> wrote:
> From: Stefan Reinauer <reinauer@chromium.org>
>
> coreboot.c and coreboot_pci.c don't contain board specific but only
> coreboot specific code. Hence move it to the coreboot directory in
> arch/x86/cpu (which should probably be moved out of cpu/ in another
> commit)

You are right - this PCI code needs to move to arch/x86/lib but the
naming will clash with the existing arch/x86/lib/pci.c (which is
16-bit PCI BIOS stuff)

Right, OK... It's about time I said this - All 16-bit code in U-Boot
after the reset vector and protected mode switch is crap!

I did do a whole heap of work to enable U-Boot to boot Linux without
the stupid BIOS stub. That work expanded upon what the coreboot guys
have done and went so far as to strip the protected-mode and real-mode
header components of the bzImage out. The vendor of the board I was
working on lost interest and the project lost momentum and it all got
too hard :(

But anyway - You will get no resistance from me if you want to take to
the 16-bit code with a flame thrower (I'll even dig up my old patches,
but that may take a little time)

Regards,

Graeme

>
> Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>  arch/x86/cpu/coreboot/Makefile                     |    2 ++
>  .../x86/cpu}/coreboot/coreboot.c                   |    0
>  .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c  |    0
>  board/chromebook-x86/coreboot/Makefile             |    2 --
>  4 files changed, 2 insertions(+), 2 deletions(-)
>  rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
>  rename board/chromebook-x86/coreboot/coreboot_pci.c => arch/x86/cpu/coreboot/pci.c (100%)
>
> diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
> index 13f5f8a..fbf5a00 100644
> --- a/arch/x86/cpu/coreboot/Makefile
> +++ b/arch/x86/cpu/coreboot/Makefile
> @@ -33,10 +33,12 @@ include $(TOPDIR)/config.mk
>
>  LIB    := $(obj)lib$(SOC).o
>
> +COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
> +COBJS-$(CONFIG_PCI) += pci.o
>
>  SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
>
> diff --git a/board/chromebook-x86/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
> similarity index 100%
> rename from board/chromebook-x86/coreboot/coreboot.c
> rename to arch/x86/cpu/coreboot/coreboot.c
> diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c b/arch/x86/cpu/coreboot/pci.c
> similarity index 100%
> rename from board/chromebook-x86/coreboot/coreboot_pci.c
> rename to arch/x86/cpu/coreboot/pci.c
> diff --git a/board/chromebook-x86/coreboot/Makefile b/board/chromebook-x86/coreboot/Makefile
> index cfcc0df..2bddf04 100644
> --- a/board/chromebook-x86/coreboot/Makefile
> +++ b/board/chromebook-x86/coreboot/Makefile
> @@ -32,8 +32,6 @@ include $(TOPDIR)/config.mk
>
>  LIB    = $(obj)lib$(BOARD).o
>
> -COBJS-y        += coreboot.o
> -COBJS-$(CONFIG_PCI) += coreboot_pci.o
>  SOBJS-y        += coreboot_start16.o
>  SOBJS-y        += coreboot_start.o
>
> --
> 1.7.7.3
>
Simon Glass - Oct. 4, 2012, 1:17 a.m.
Hi Graeme,

On Wed, Oct 3, 2012 at 6:12 PM, Graeme Russ <graeme.russ@gmail.com> wrote:
> Hi Simon,
>
> On Thu, Oct 4, 2012 at 10:39 AM, Simon Glass <sjg@chromium.org> wrote:
>> From: Stefan Reinauer <reinauer@chromium.org>
>>
>> coreboot.c and coreboot_pci.c don't contain board specific but only
>> coreboot specific code. Hence move it to the coreboot directory in
>> arch/x86/cpu (which should probably be moved out of cpu/ in another
>> commit)
>
> You are right - this PCI code needs to move to arch/x86/lib but the
> naming will clash with the existing arch/x86/lib/pci.c (which is
> 16-bit PCI BIOS stuff)
>
> Right, OK... It's about time I said this - All 16-bit code in U-Boot
> after the reset vector and protected mode switch is crap!
>
> I did do a whole heap of work to enable U-Boot to boot Linux without
> the stupid BIOS stub. That work expanded upon what the coreboot guys
> have done and went so far as to strip the protected-mode and real-mode
> header components of the bzImage out. The vendor of the board I was
> working on lost interest and the project lost momentum and it all got
> too hard :(
>
> But anyway - You will get no resistance from me if you want to take to
> the 16-bit code with a flame thrower (I'll even dig up my old patches,
> but that may take a little time)

Hmm ok. So, should we look at moving pci.c into lib/ now (and renaming
it). Or leave that until later?

Not sure about removing all the 16-bit code. Are there really no users?

Regards,
Simon

>
> Regards,
>
> Graeme
>
>>
>> Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
>> Signed-off-by: Simon Glass <sjg@chromium.org>
>> ---
>>  arch/x86/cpu/coreboot/Makefile                     |    2 ++
>>  .../x86/cpu}/coreboot/coreboot.c                   |    0
>>  .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c  |    0
>>  board/chromebook-x86/coreboot/Makefile             |    2 --
>>  4 files changed, 2 insertions(+), 2 deletions(-)
>>  rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
>>  rename board/chromebook-x86/coreboot/coreboot_pci.c => arch/x86/cpu/coreboot/pci.c (100%)
>>
>> diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
>> index 13f5f8a..fbf5a00 100644
>> --- a/arch/x86/cpu/coreboot/Makefile
>> +++ b/arch/x86/cpu/coreboot/Makefile
>> @@ -33,10 +33,12 @@ include $(TOPDIR)/config.mk
>>
>>  LIB    := $(obj)lib$(SOC).o
>>
>> +COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
>>  COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
>>  COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
>>  COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
>>  COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
>> +COBJS-$(CONFIG_PCI) += pci.o
>>
>>  SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
>>
>> diff --git a/board/chromebook-x86/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
>> similarity index 100%
>> rename from board/chromebook-x86/coreboot/coreboot.c
>> rename to arch/x86/cpu/coreboot/coreboot.c
>> diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c b/arch/x86/cpu/coreboot/pci.c
>> similarity index 100%
>> rename from board/chromebook-x86/coreboot/coreboot_pci.c
>> rename to arch/x86/cpu/coreboot/pci.c
>> diff --git a/board/chromebook-x86/coreboot/Makefile b/board/chromebook-x86/coreboot/Makefile
>> index cfcc0df..2bddf04 100644
>> --- a/board/chromebook-x86/coreboot/Makefile
>> +++ b/board/chromebook-x86/coreboot/Makefile
>> @@ -32,8 +32,6 @@ include $(TOPDIR)/config.mk
>>
>>  LIB    = $(obj)lib$(BOARD).o
>>
>> -COBJS-y        += coreboot.o
>> -COBJS-$(CONFIG_PCI) += coreboot_pci.o
>>  SOBJS-y        += coreboot_start16.o
>>  SOBJS-y        += coreboot_start.o
>>
>> --
>> 1.7.7.3
>>
Graeme Russ - Oct. 4, 2012, 1:27 a.m.
Hi Simon,

On Thu, Oct 4, 2012 at 11:17 AM, Simon Glass <sjg@chromium.org> wrote:
> Hi Graeme,
>
> On Wed, Oct 3, 2012 at 6:12 PM, Graeme Russ <graeme.russ@gmail.com> wrote:
>> Hi Simon,
>>
>> On Thu, Oct 4, 2012 at 10:39 AM, Simon Glass <sjg@chromium.org> wrote:
>>> From: Stefan Reinauer <reinauer@chromium.org>
>>>
>>> coreboot.c and coreboot_pci.c don't contain board specific but only
>>> coreboot specific code. Hence move it to the coreboot directory in
>>> arch/x86/cpu (which should probably be moved out of cpu/ in another
>>> commit)
>>
>> You are right - this PCI code needs to move to arch/x86/lib but the
>> naming will clash with the existing arch/x86/lib/pci.c (which is
>> 16-bit PCI BIOS stuff)
>>
>> Right, OK... It's about time I said this - All 16-bit code in U-Boot
>> after the reset vector and protected mode switch is crap!
>>
>> I did do a whole heap of work to enable U-Boot to boot Linux without
>> the stupid BIOS stub. That work expanded upon what the coreboot guys
>> have done and went so far as to strip the protected-mode and real-mode
>> header components of the bzImage out. The vendor of the board I was
>> working on lost interest and the project lost momentum and it all got
>> too hard :(
>>
>> But anyway - You will get no resistance from me if you want to take to
>> the 16-bit code with a flame thrower (I'll even dig up my old patches,
>> but that may take a little time)
>
> Hmm ok. So, should we look at moving pci.c into lib/ now (and renaming
> it). Or leave that until later?

I think it's about time it moved
>
> Not sure about removing all the 16-bit code. Are there really no users?

There is exactly one - eNET and as it's maintainer, I am very happy to
see that code disappear. It will give me incentive to dust of my eNET
(which I have not touched for two years) and get the kernel booting
without the real-mode fluff.

The main issue is how the Linux kernel is built - You end up with
bzImage that looks like:

+-----------------------+
|        Header         |
+-----------------------+
|     Real-Mode code    |
+-----------------------+
|    Decompress Code    |
|    (Protected Mode)   |
+-----------------------+
|      Compressed       |
| Protected Mode Code   |
|     (The Kernel)      |
|                       |
+-----------------------+

What you end up with is a double-copy - bzImage from storage to RAM
and then a decompress by the bzImage's own decompress code. I had some
script which stripped out the Real-Mode and Decompress code and
produced two files (the Header and the compressed kernel) - From there
you could read the header and the decompress directly from the file
system to the kernel's final resting place

Now HPA will not like that one little bit :) But I'm open to suggestions

Regards,

Graeme

Patch

diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
index 13f5f8a..fbf5a00 100644
--- a/arch/x86/cpu/coreboot/Makefile
+++ b/arch/x86/cpu/coreboot/Makefile
@@ -33,10 +33,12 @@  include $(TOPDIR)/config.mk
 
 LIB	:= $(obj)lib$(SOC).o
 
+COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
 COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
 COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
 COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
 COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
+COBJS-$(CONFIG_PCI) += pci.o
 
 SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
 
diff --git a/board/chromebook-x86/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
similarity index 100%
rename from board/chromebook-x86/coreboot/coreboot.c
rename to arch/x86/cpu/coreboot/coreboot.c
diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c b/arch/x86/cpu/coreboot/pci.c
similarity index 100%
rename from board/chromebook-x86/coreboot/coreboot_pci.c
rename to arch/x86/cpu/coreboot/pci.c
diff --git a/board/chromebook-x86/coreboot/Makefile b/board/chromebook-x86/coreboot/Makefile
index cfcc0df..2bddf04 100644
--- a/board/chromebook-x86/coreboot/Makefile
+++ b/board/chromebook-x86/coreboot/Makefile
@@ -32,8 +32,6 @@  include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS-y	+= coreboot.o
-COBJS-$(CONFIG_PCI) += coreboot_pci.o
 SOBJS-y	+= coreboot_start16.o
 SOBJS-y	+= coreboot_start.o