From patchwork Wed Oct 3 13:29:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 188766 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id F28D32C00BE for ; Wed, 3 Oct 2012 23:28:57 +1000 (EST) Received: from localhost ([::1]:36675 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJP0S-0004Yk-1J for incoming@patchwork.ozlabs.org; Wed, 03 Oct 2012 09:28:56 -0400 Received: from eggs.gnu.org ([208.118.235.92]:37121) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJOzy-0004B8-NZ for qemu-devel@nongnu.org; Wed, 03 Oct 2012 09:28:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TJOzt-0006b5-20 for qemu-devel@nongnu.org; Wed, 03 Oct 2012 09:28:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:63844) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJOzs-0006aK-Qu for qemu-devel@nongnu.org; Wed, 03 Oct 2012 09:28:21 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q93DSKiS027910 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 3 Oct 2012 09:28:20 -0400 Received: from blackpad.lan.raisama.net (vpn1-7-147.gru2.redhat.com [10.97.7.147]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id q93DSJnK013901; Wed, 3 Oct 2012 09:28:19 -0400 Received: by blackpad.lan.raisama.net (Postfix, from userid 500) id DD5E2203626; Wed, 3 Oct 2012 10:29:20 -0300 (BRT) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Wed, 3 Oct 2012 10:29:02 -0300 Message-Id: <1349270954-4657-7-git-send-email-ehabkost@redhat.com> In-Reply-To: <1349270954-4657-1-git-send-email-ehabkost@redhat.com> References: <1349270954-4657-1-git-send-email-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Gleb Natapov , Paolo Bonzini Subject: [Qemu-devel] [RFC 06/18] hw/apic.c: rename bit functions to not conflict with bitops.h (v2) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Changes v1 -> v2: - Coding style change: break too-long line Signed-off-by: Eduardo Habkost --- hw/apic.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/hw/apic.c b/hw/apic.c index 385555e..e1f633a 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -51,7 +51,7 @@ static int ffs_bit(uint32_t value) return ctz32(value); } -static inline void set_bit(uint32_t *tab, int index) +static inline void apic_set_bit(uint32_t *tab, int index) { int i, mask; i = index >> 5; @@ -59,7 +59,7 @@ static inline void set_bit(uint32_t *tab, int index) tab[i] |= mask; } -static inline void reset_bit(uint32_t *tab, int index) +static inline void apic_reset_bit(uint32_t *tab, int index) { int i, mask; i = index >> 5; @@ -67,7 +67,7 @@ static inline void reset_bit(uint32_t *tab, int index) tab[i] &= ~mask; } -static inline int get_bit(uint32_t *tab, int index) +static inline int apic_get_bit(uint32_t *tab, int index) { int i, mask; i = index >> 5; @@ -184,7 +184,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level) case APIC_DM_FIXED: if (!(lvt & APIC_LVT_LEVEL_TRIGGER)) break; - reset_bit(s->irr, lvt & 0xff); + apic_reset_bit(s->irr, lvt & 0xff); /* fall through */ case APIC_DM_EXTINT: cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); @@ -379,13 +379,13 @@ void apic_poll_irq(DeviceState *d) static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode) { - apic_report_irq_delivered(!get_bit(s->irr, vector_num)); + apic_report_irq_delivered(!apic_get_bit(s->irr, vector_num)); - set_bit(s->irr, vector_num); + apic_set_bit(s->irr, vector_num); if (trigger_mode) - set_bit(s->tmr, vector_num); + apic_set_bit(s->tmr, vector_num); else - reset_bit(s->tmr, vector_num); + apic_reset_bit(s->tmr, vector_num); if (s->vapic_paddr) { apic_sync_vapic(s, SYNC_ISR_IRR_TO_VAPIC); /* @@ -405,8 +405,9 @@ static void apic_eoi(APICCommonState *s) isrv = get_highest_priority_int(s->isr); if (isrv < 0) return; - reset_bit(s->isr, isrv); - if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && get_bit(s->tmr, isrv)) { + apic_reset_bit(s->isr, isrv); + if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && + apic_get_bit(s->tmr, isrv)) { ioapic_eoi_broadcast(isrv); } apic_sync_vapic(s, SYNC_FROM_VAPIC | SYNC_TO_VAPIC); @@ -445,7 +446,7 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, int idx = apic_find_dest(dest); memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t)); if (idx >= 0) - set_bit(deliver_bitmask, idx); + apic_set_bit(deliver_bitmask, idx); } } else { /* XXX: cluster mode */ @@ -455,11 +456,11 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, if (apic_iter) { if (apic_iter->dest_mode == 0xf) { if (dest & apic_iter->log_dest) - set_bit(deliver_bitmask, i); + apic_set_bit(deliver_bitmask, i); } else if (apic_iter->dest_mode == 0x0) { if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) && (dest & apic_iter->log_dest & 0x0f)) { - set_bit(deliver_bitmask, i); + apic_set_bit(deliver_bitmask, i); } } } else { @@ -502,14 +503,14 @@ static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, break; case 1: memset(deliver_bitmask, 0x00, sizeof(deliver_bitmask)); - set_bit(deliver_bitmask, s->idx); + apic_set_bit(deliver_bitmask, s->idx); break; case 2: memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); break; case 3: memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); - reset_bit(deliver_bitmask, s->idx); + apic_reset_bit(deliver_bitmask, s->idx); break; } @@ -566,8 +567,8 @@ int apic_get_interrupt(DeviceState *d) apic_sync_vapic(s, SYNC_TO_VAPIC); return s->spurious_vec & 0xff; } - reset_bit(s->irr, intno); - set_bit(s->isr, intno); + apic_reset_bit(s->irr, intno); + apic_set_bit(s->isr, intno); apic_sync_vapic(s, SYNC_TO_VAPIC); /* re-inject if there is still a pending PIC interrupt */