From patchwork Wed Oct 3 07:48:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peter A. G. Crosthwaite" X-Patchwork-Id: 188720 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 869A42C00E4 for ; Wed, 3 Oct 2012 17:53:48 +1000 (EST) Received: from localhost ([::1]:51061 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJJm6-0005WY-Od for incoming@patchwork.ozlabs.org; Wed, 03 Oct 2012 03:53:46 -0400 Received: from eggs.gnu.org ([208.118.235.92]:38732) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJJiZ-0002dW-Dm for qemu-devel@nongnu.org; Wed, 03 Oct 2012 03:50:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TJJiS-0005Qt-N1 for qemu-devel@nongnu.org; Wed, 03 Oct 2012 03:50:06 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:42989) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJJiS-00057k-Fj for qemu-devel@nongnu.org; Wed, 03 Oct 2012 03:50:00 -0400 Received: by mail-pa0-f45.google.com with SMTP id fb10so6144090pad.4 for ; Wed, 03 Oct 2012 00:50:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references:x-gm-message-state; bh=sXUbPOa422ejGsIEj9ne2+a22E0G/PL+lUN1GlvtJ/o=; b=NsUi3pegKDzd0jqT5y3obfg4CXhzfRBkPdaXy3AnXjKozKHxvErG77WgHDshO/jkF4 /Kp8GzlPo42xA5DiuJSzjYyLXAoauNP1p0PDqtaoSdlWFHSivjRjUADzpQA1eeHhWr/i 2FLgjaYXqDYIn1l6cy3dSOxPDMe8M2J6DW9ORHCS9vQSjj8jqmVIJTUnN+LA6xQdCBH9 pYiIdgb9VihVssLOSukAKftqRf7yr40sKrafIdB4eq+BZdR3J+qxKbBcuM3kbUROioei U/2Bk4xUHY7IoSB1yR4YV1UD6unBhVqRa2ufHkqBE7YVr1CzoB/DhKPLYtyNkM6O3sL0 eeCw== Received: by 10.66.79.166 with SMTP id k6mr3194552pax.25.1349250599841; Wed, 03 Oct 2012 00:49:59 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id vw4sm1006126pbc.26.2012.10.03.00.49.56 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 03 Oct 2012 00:49:59 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org, paul@codesourcery.com, edgar.iglesias@gmail.com, peter.maydell@linaro.org, stefanha@gmail.com Date: Wed, 3 Oct 2012 17:48:38 +1000 Message-Id: <7c91fdb9d107ce3e2e1e4c00d68a3d51ded56d30.1349249771.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQnrg/5XucKtN7H/PtGt4oPxKX1ZL+O1PpyJ9ILqsFuFhWQqnzSna2NqqMKVEnxqmadYuNQp X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.220.45 Cc: blauwirbel@gmail.com, "Peter A. G. Crosthwaite" , i.mitsyanko@samsung.com Subject: [Qemu-devel] [PATCH v8 10/14] petalogix-ml605: added SPI controller with n25q128 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter A. G. Crosthwaite Added SPI controller to the reference design, with two n25q128 spi-flashes connected. Signed-off-by: Peter A. G. Crosthwaite --- Changed since v7: Increased number of spi flashes to 4 Fixed spi controller qdev name and property names (see prev patch) Changed since v5: Removed redundant (char*) cast with qdev_get_prop_string hw/petalogix_ml605_mmu.c | 27 +++++++++++++++++++++++++++ 1 files changed, 27 insertions(+), 0 deletions(-) diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c index dced648..b9bfbed 100644 --- a/hw/petalogix_ml605_mmu.c +++ b/hw/petalogix_ml605_mmu.c @@ -36,6 +36,7 @@ #include "blockdev.h" #include "pc.h" #include "exec-memory.h" +#include "ssi.h" #include "microblaze_boot.h" #include "microblaze_pic_cpu.h" @@ -47,6 +48,8 @@ #define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb" +#define NUM_SPI_FLASHES 4 + #define MEMORY_BASEADDR 0x50000000 #define FLASH_BASEADDR 0x86000000 #define INTC_BASEADDR 0x81800000 @@ -79,6 +82,7 @@ petalogix_ml605_init(ram_addr_t ram_size, MemoryRegion *address_space_mem = get_system_memory(); DeviceState *dev, *dma, *eth0; MicroBlazeCPU *cpu; + SysBusDevice *busdev; CPUMBState *env; DriveInfo *dinfo; int i; @@ -139,6 +143,29 @@ petalogix_ml605_init(ram_addr_t ram_size, xilinx_axiethernetdma_init(dma, STREAM_SLAVE(eth0), 0x84600000, irq[1], irq[0], 100 * 1000000); + { + SSIBus *spi; + + dev = qdev_create(NULL, "xlnx.xps-spi"); + qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES); + qdev_init_nofail(dev); + busdev = sysbus_from_qdev(dev); + sysbus_mmio_map(busdev, 0, 0x40a00000); + sysbus_connect_irq(busdev, 0, irq[4]); + + spi = (SSIBus *)qdev_get_child_bus(dev, "spi"); + + for (i = 0; i < NUM_SPI_FLASHES; i++) { + qemu_irq cs_line; + + dev = ssi_create_slave_no_init(spi, "m25p80"); + qdev_prop_set_string(dev, "partname", "n25q128"); + qdev_init_nofail(dev); + cs_line = qdev_get_gpio_in(dev, 0); + sysbus_connect_irq(busdev, i+1, cs_line); + } + } + microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE, machine_cpu_reset);