From patchwork Tue Oct 2 22:45:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Warren X-Patchwork-Id: 188677 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id ABA5C2C00B5 for ; Wed, 3 Oct 2012 08:47:14 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C41F6280CC; Wed, 3 Oct 2012 00:47:03 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QUcGeL0FZYJR; Wed, 3 Oct 2012 00:47:03 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 879092809D; Wed, 3 Oct 2012 00:46:52 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8394928090 for ; Wed, 3 Oct 2012 00:46:46 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SpRmaKHg7lc6 for ; Wed, 3 Oct 2012 00:46:46 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-da0-f44.google.com (mail-da0-f44.google.com [209.85.210.44]) by theia.denx.de (Postfix) with ESMTPS id A2BC0280A0 for ; Wed, 3 Oct 2012 00:46:28 +0200 (CEST) Received: by danh15 with SMTP id h15so2139894dan.3 for ; Tue, 02 Oct 2012 15:46:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-nvconfidentiality; bh=M4y4BP/ePmw/WEoucRpHKSMSA1LlGYCDuqfdTHCm89I=; b=DbQp/UK8DDOmtCM2UwUI3hDH9wZom7VvISOw7ja5Ulsh0qFHsp85M2I/9cLNjlTU4k nW8MYDAPWNHm9wGUovCX7dZpFOn1LESnpw3jUzzR/pkHBOrXr2PS+OGsr4eeeswfTLMw dQ9iYSz3yFvTbdFGJ/mJyeiI/v4Y3sR7LFMAiCAJGS4djO9jcUw1+uONqOIyrX86TimN rd9ZmsMUU2eWm2KP0so2tyaFA4QiowHD/d/zrvOMBjNNDONiKNkGsHNoz9xgrsJJ8is1 rjVOGH/bAAjnVXPF4F+QzNcVk9arwNOUFYg21xlYFzT69qINiukgdmQncZZlg4WqIaJB 8k2w== Received: by 10.68.218.101 with SMTP id pf5mr8044294pbc.60.1349217987349; Tue, 02 Oct 2012 15:46:27 -0700 (PDT) Received: from localhost.localdomain (ip68-230-103-25.ph.ph.cox.net. [68.230.103.25]) by mx.google.com with ESMTPS id gj9sm1535379pbc.16.2012.10.02.15.46.25 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 02 Oct 2012 15:46:26 -0700 (PDT) From: Tom Warren To: u-boot@lists.denx.de Date: Tue, 2 Oct 2012 15:45:53 -0700 Message-Id: <1349217955-8729-6-git-send-email-twarren@nvidia.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1349217955-8729-1-git-send-email-twarren@nvidia.com> References: <1349217955-8729-1-git-send-email-twarren@nvidia.com> X-NVConfidentiality: public Cc: swarren@nvidia.com, Tom Warren , trini@ti.com, twarren.nvidia@gmail.com Subject: [U-Boot] [PATCH 5/7] Tegra30: Cardhu: Add DT files X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren --- arch/arm/dts/tegra30.dtsi | 30 ++++++++++++++++++++++++++++++ board/nvidia/dts/tegra30-cardhu.dts | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+), 0 deletions(-) create mode 100644 arch/arm/dts/tegra30.dtsi create mode 100644 board/nvidia/dts/tegra30-cardhu.dts diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi new file mode 100644 index 0000000..122c134 --- /dev/null +++ b/arch/arm/dts/tegra30.dtsi @@ -0,0 +1,30 @@ +/include/ "skeleton.dtsi" + +/ { + model = "NVIDIA Tegra30"; + compatible = "nvidia,tegra30"; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + }; + + gpio: gpio@6000d000 { + compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; + reg = <0x6000d000 0x1000>; + #gpio-cells = <2>; + gpio-controller; + }; + + serial@70006000 { + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; + reg = <0x70006000 0x40>; + reg-shift = <2>; + status = "disabled"; + }; +}; diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts new file mode 100644 index 0000000..68563e8 --- /dev/null +++ b/board/nvidia/dts/tegra30-cardhu.dts @@ -0,0 +1,35 @@ +/dts-v1/; + +/memreserve/ 0x1c000000 0x04000000; +/include/ ARCH_CPU_DTS + +/ { + model = "NVIDIA Cardhu"; + compatible = "nvidia,cardhu", "nvidia,tegra30"; + + aliases { + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0xc0000000>; + }; + + clocks { + clk_32k: clk_32k { + clock_frequency = <32000>; + }; + osc { + clock-frequency = <12000000>; + }; + }; + + clock@60006000 { + clocks = <&clk_32k &osc>; + }; + + serial@70006000 { + status = "ok"; + clock-frequency = < 216000000 >; + }; +};