From patchwork Tue Oct 2 21:20:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 188652 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 415A92C008D for ; Wed, 3 Oct 2012 07:20:36 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 03E1A28088; Tue, 2 Oct 2012 23:20:35 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2R88ba5jcxm0; Tue, 2 Oct 2012 23:20:34 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D56B628080; Tue, 2 Oct 2012 23:20:33 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 50C5B28080 for ; Tue, 2 Oct 2012 23:20:31 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WtumwEPxU6A4 for ; Tue, 2 Oct 2012 23:20:30 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from va3outboundpool.messaging.microsoft.com (va3ehsobe003.messaging.microsoft.com [216.32.180.13]) by theia.denx.de (Postfix) with ESMTPS id 33F5728077 for ; Tue, 2 Oct 2012 23:20:28 +0200 (CEST) Received: from mail140-va3-R.bigfish.com (10.7.14.245) by VA3EHSOBE003.bigfish.com (10.7.40.23) with Microsoft SMTP Server id 14.1.225.23; Tue, 2 Oct 2012 21:20:26 +0000 Received: from mail140-va3 (localhost [127.0.0.1]) by mail140-va3-R.bigfish.com (Postfix) with ESMTP id A8099E010B; Tue, 2 Oct 2012 21:20:26 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah107ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1155h) Received: from mail140-va3 (localhost.localdomain [127.0.0.1]) by mail140-va3 (MessageSwitch) id 134921282514862_22324; Tue, 2 Oct 2012 21:20:25 +0000 (UTC) Received: from VA3EHSMHS020.bigfish.com (unknown [10.7.14.243]) by mail140-va3.bigfish.com (Postfix) with ESMTP id DC7FB160046; Tue, 2 Oct 2012 21:20:24 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS020.bigfish.com (10.7.99.30) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 2 Oct 2012 21:20:21 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.309.3; Tue, 2 Oct 2012 16:20:20 -0500 Received: from fabio-Latitude-E6410.am.freescale.net ([10.29.240.141]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q92LKEAA018031; Tue, 2 Oct 2012 14:20:19 -0700 From: Fabio Estevam To: Date: Tue, 2 Oct 2012 18:20:12 -0300 Message-ID: <1349212812-6527-1-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Fabio Estevam , u-boot@lists.denx.de Subject: [U-Boot] [PATCH] mx6qsabreauto: Pass the board revision to the kernel X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The kernel from Freescale expects that the bootloader passes the board revision. Read the board revision and pass it via get_board_rev(). Without passing the board revision the kernel does not operate properly as the initialization of peripherals are different in revA versus revB boards. Signed-off-by: Fabio Estevam --- arch/arm/include/asm/arch-mx6/imx-regs.h | 6 ++++ board/freescale/mx6qsabreauto/mx6qsabreauto.c | 48 +++++++++++++++++++++++-- 2 files changed, 52 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index dc737ba..09ab010 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -200,6 +200,12 @@ struct src { u32 gpr10; }; +/* OCOTP Registers */ +struct ocotp_regs { + u32 reserved[0x198]; + u32 gp1; /* 0x660 */ +}; + /* GPR3 bitfields */ #define IOMUXC_GPR3_GPU_DBG_OFFSET 29 #define IOMUXC_GPR3_GPU_DBG_MASK (3< #include #include +#include + DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ @@ -164,9 +166,38 @@ int board_eth_init(bd_t *bis) return 0; } +#define BOARD_REV_B 0x200 +#define BOARD_REV_A 0x100 + +static int mx6sabre_rev(void) +{ + /* + * Get Board ID information from OCOTP_GP1[15:8] + * i.MX6Q ARD RevA: 0x01 + * i.MX6Q ARD RevB: 0x02 + */ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + int reg = readl(&ocotp->gp1); + int ret; + + switch (reg >> 8 & 0x0F) { + case 0x02: + ret = BOARD_REV_B; + break; + case 0x01: + default: + ret = BOARD_REV_A; + break; + } + + return ret; +} + u32 get_board_rev(void) { - return 0x63000; + int rev = mx6sabre_rev(); + + return (get_cpu_rev() & ~(0xF << 8)) | rev; } int board_early_init_f(void) @@ -186,7 +217,20 @@ int board_init(void) int checkboard(void) { - puts("Board: MX6Q-Sabreauto\n"); + int rev = mx6sabre_rev(); + char *revname; + + switch (rev) { + case BOARD_REV_B: + revname = "B"; + break; + case BOARD_REV_A: + default: + revname = "A"; + break; + } + + printf("Board: MX6Q-Sabreauto rev%s\n", revname); return 0; }