From patchwork Mon Oct 1 18:36:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau?= X-Patchwork-Id: 188329 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 52F312C00B4 for ; Tue, 2 Oct 2012 04:31:43 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9D80028080; Mon, 1 Oct 2012 20:31:41 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dnOiPlWKAhvQ; Mon, 1 Oct 2012 20:31:41 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ED41A28077; Mon, 1 Oct 2012 20:31:39 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 310EC28077 for ; Mon, 1 Oct 2012 20:31:37 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id O3IaMU1MOgZq for ; Mon, 1 Oct 2012 20:31:35 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from zose-mta15.web4all.fr (zose-mta15.web4all.fr [176.31.217.11]) by theia.denx.de (Postfix) with ESMTP id 8808728071 for ; Mon, 1 Oct 2012 20:31:34 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zose-mta15.web4all.fr (Postfix) with ESMTP id 5B72332140; Mon, 1 Oct 2012 20:34:37 +0200 (CEST) X-Virus-Scanned: amavisd-new at zose1.web4all.fr Received: from zose-mta15.web4all.fr ([127.0.0.1]) by localhost (zose-mta15.web4all.fr [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IdbmlRtMH0NR; Mon, 1 Oct 2012 20:34:35 +0200 (CEST) Received: from zose-store12.web4all.fr (zose-store12.web4all.fr [178.33.204.49]) by zose-mta15.web4all.fr (Postfix) with ESMTP id 391CE32122; Mon, 1 Oct 2012 20:34:35 +0200 (CEST) Date: Mon, 1 Oct 2012 20:36:25 +0200 (CEST) From: =?utf-8?Q?Beno=C3=AEt_Th=C3=A9baudeau?= To: U-Boot-Users ML Message-ID: <700502810.5864149.1349116585050.JavaMail.root@advansee.com> In-Reply-To: <863918819.5372716.1348777862610.JavaMail.root@advansee.com> MIME-Version: 1.0 X-Originating-IP: [88.188.188.98] X-Mailer: Zimbra 7.2.0_GA_2669 (ZimbraWebClient - FF3.0 (Win)/7.2.0_GA_2669) Cc: Fabio Estevam , Otavio Salvador , Eric =?utf-8?Q?B=C3=A9nard?= , Andy Fleming Subject: [U-Boot] [PATCH v2] mxc: Fix SDHC multi-instance clock X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic Cc: Eric Bénard Cc: Otavio Salvador Cc: Fabio Estevam Cc: Jason Liu Cc: Matt Sealey Cc: Andy Fleming --- This patch should be applied after (series of series...): http://patchwork.ozlabs.org/patch/187467/ http://patchwork.ozlabs.org/patch/187468/ http://patchwork.ozlabs.org/patch/187475/ This patch supersedes http://patchwork.ozlabs.org/patch/187476/ . Changes for v2: - Since this patch will go to /next, extend the original patch with the mxc boards newly added to this branch: mx6qsabreauto and mx6qsabresd. .../board/esg/ima3-mx53/ima3-mx53.c | 1 + .../board/freescale/mx35pdk/mx35pdk.c | 2 ++ .../board/freescale/mx51evk/mx51evk.c | 4 ++++ .../board/freescale/mx53ard/mx53ard.c | 4 ++++ .../board/freescale/mx53evk/mx53evk.c | 4 ++++ .../board/freescale/mx53loco/mx53loco.c | 3 +++ .../board/freescale/mx53smd/mx53smd.c | 3 +++ .../board/freescale/mx6qarm2/mx6qarm2.c | 4 ++++ .../board/freescale/mx6qsabreauto/mx6qsabreauto.c | 1 + .../board/freescale/mx6qsabrelite/mx6qsabrelite.c | 3 +++ .../board/freescale/mx6qsabresd/mx6qsabresd.c | 1 + .../board/genesi/mx51_efikamx/efikamx.c | 4 ++++ .../board/ttcontrol/vision2/vision2.c | 2 ++ .../drivers/mmc/fsl_esdhc.c | 5 +++-- .../include/fsl_esdhc.h | 1 + 15 files changed, 40 insertions(+), 2 deletions(-) diff --git u-boot-imx-next-5cddb49.orig/board/esg/ima3-mx53/ima3-mx53.c u-boot-imx-next-5cddb49/board/esg/ima3-mx53/ima3-mx53.c index e947330..41d6bb6 100644 --- u-boot-imx-next-5cddb49.orig/board/esg/ima3-mx53/ima3-mx53.c +++ u-boot-imx-next-5cddb49/board/esg/ima3-mx53/ima3-mx53.c @@ -217,6 +217,7 @@ int board_mmc_init(bd_t *bis) PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); return fsl_esdhc_initialize(bis, &esdhc_cfg); } #endif diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx35pdk/mx35pdk.c u-boot-imx-next-5cddb49/board/freescale/mx35pdk/mx35pdk.c index 7cb6b30..a12531f 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx35pdk/mx35pdk.c +++ u-boot-imx-next-5cddb49/board/freescale/mx35pdk/mx35pdk.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -292,6 +293,7 @@ int board_mmc_init(bd_t *bis) mxc_request_iomux(MX35_PIN_SD1_DATA2, MUX_CONFIG_FUNC); mxc_request_iomux(MX35_PIN_SD1_DATA3, MUX_CONFIG_FUNC); + esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK); return fsl_esdhc_initialize(bis, &esdhc_cfg); } diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx51evk/mx51evk.c u-boot-imx-next-5cddb49/board/freescale/mx51evk/mx51evk.c index a94701c..3412952 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx51evk/mx51evk.c +++ u-boot-imx-next-5cddb49/board/freescale/mx51evk/mx51evk.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -358,6 +359,9 @@ int board_mmc_init(bd_t *bis) u32 index; s32 status = 0; + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { switch (index) { diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53ard/mx53ard.c u-boot-imx-next-5cddb49/board/freescale/mx53ard/mx53ard.c index 08c7795..2fc8570 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx53ard/mx53ard.c +++ u-boot-imx-next-5cddb49/board/freescale/mx53ard/mx53ard.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -106,6 +107,9 @@ int board_mmc_init(bd_t *bis) u32 index; s32 status = 0; + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { switch (index) { case 0: diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53evk/mx53evk.c u-boot-imx-next-5cddb49/board/freescale/mx53evk/mx53evk.c index b11a94c..bb4621d 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx53evk/mx53evk.c +++ u-boot-imx-next-5cddb49/board/freescale/mx53evk/mx53evk.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -232,6 +233,9 @@ int board_mmc_init(bd_t *bis) u32 index; s32 status = 0; + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { switch (index) { case 0: diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53loco/mx53loco.c u-boot-imx-next-5cddb49/board/freescale/mx53loco/mx53loco.c index 6543209..20569a5 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx53loco/mx53loco.c +++ u-boot-imx-next-5cddb49/board/freescale/mx53loco/mx53loco.c @@ -192,6 +192,9 @@ int board_mmc_init(bd_t *bis) u32 index; s32 status = 0; + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { switch (index) { case 0: diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53smd/mx53smd.c u-boot-imx-next-5cddb49/board/freescale/mx53smd/mx53smd.c index 7f35ddd..761f727 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx53smd/mx53smd.c +++ u-boot-imx-next-5cddb49/board/freescale/mx53smd/mx53smd.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -144,6 +145,8 @@ int board_mmc_init(bd_t *bis) u32 index; s32 status = 0; + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { switch (index) { case 0: diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qarm2/mx6qarm2.c u-boot-imx-next-5cddb49/board/freescale/mx6qarm2/mx6qarm2.c index d43b327..dad4b95 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qarm2/mx6qarm2.c +++ u-boot-imx-next-5cddb49/board/freescale/mx6qarm2/mx6qarm2.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -139,6 +140,9 @@ int board_mmc_init(bd_t *bis) s32 status = 0; u32 index = 0; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { switch (index) { case 0: diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabreauto/mx6qsabreauto.c u-boot-imx-next-5cddb49/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 8913b21..1309fca 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ u-boot-imx-next-5cddb49/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -85,6 +85,7 @@ int board_mmc_init(bd_t *bis) { imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } #endif diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabrelite/mx6qsabrelite.c u-boot-imx-next-5cddb49/board/freescale/mx6qsabrelite/mx6qsabrelite.c index d274d8c..23f1719 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ u-boot-imx-next-5cddb49/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -269,6 +269,9 @@ int board_mmc_init(bd_t *bis) s32 status = 0; u32 index = 0; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { switch (index) { case 0: diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabresd/mx6qsabresd.c u-boot-imx-next-5cddb49/board/freescale/mx6qsabresd/mx6qsabresd.c index 03a6857..e02daa4 100644 --- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabresd/mx6qsabresd.c +++ u-boot-imx-next-5cddb49/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -120,6 +120,7 @@ int board_mmc_init(bd_t *bis) { imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } #endif diff --git u-boot-imx-next-5cddb49.orig/board/genesi/mx51_efikamx/efikamx.c u-boot-imx-next-5cddb49/board/genesi/mx51_efikamx/efikamx.c index cfd2e93..e334c01 100644 --- u-boot-imx-next-5cddb49.orig/board/genesi/mx51_efikamx/efikamx.c +++ u-boot-imx-next-5cddb49/board/genesi/mx51_efikamx/efikamx.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -349,6 +350,9 @@ int board_mmc_init(bd_t *bis) gpio_direction_input(EFIKASB_SDHC1_CD); } + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]); if (machine_is_efikasb()) { diff --git u-boot-imx-next-5cddb49.orig/board/ttcontrol/vision2/vision2.c u-boot-imx-next-5cddb49/board/ttcontrol/vision2/vision2.c index f28eab0..ba3307b 100644 --- u-boot-imx-next-5cddb49.orig/board/ttcontrol/vision2/vision2.c +++ u-boot-imx-next-5cddb49/board/ttcontrol/vision2/vision2.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -590,6 +591,7 @@ int board_mmc_init(bd_t *bis) mxc_iomux_set_pad(MX51_PIN_GPIO1_1, PAD_CTL_HYS_ENABLE); + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); } #endif diff --git u-boot-imx-next-5cddb49.orig/drivers/mmc/fsl_esdhc.c u-boot-imx-next-5cddb49/drivers/mmc/fsl_esdhc.c index 3f8d30d..aa6a9f1 100644 --- u-boot-imx-next-5cddb49.orig/drivers/mmc/fsl_esdhc.c +++ u-boot-imx-next-5cddb49/drivers/mmc/fsl_esdhc.c @@ -410,12 +410,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) return 0; } -void set_sysctl(struct mmc *mmc, uint clock) +static void set_sysctl(struct mmc *mmc, uint clock) { - int sdhc_clk = gd->sdhc_clk; int div, pre_div; struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; + int sdhc_clk = cfg->sdhc_clk; uint clk; if (clock < mmc->f_min) @@ -598,6 +598,7 @@ int fsl_esdhc_mmc_init(bd_t *bis) cfg = malloc(sizeof(struct fsl_esdhc_cfg)); memset(cfg, 0, sizeof(struct fsl_esdhc_cfg)); cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR; + cfg->sdhc_clk = gd->sdhc_clk; return fsl_esdhc_initialize(bis, cfg); } diff --git u-boot-imx-next-5cddb49.orig/include/fsl_esdhc.h u-boot-imx-next-5cddb49/include/fsl_esdhc.h index 4e321e7..47d2fe4 100644 --- u-boot-imx-next-5cddb49.orig/include/fsl_esdhc.h +++ u-boot-imx-next-5cddb49/include/fsl_esdhc.h @@ -167,6 +167,7 @@ struct fsl_esdhc_cfg { u32 esdhc_base; + u32 sdhc_clk; }; /* Select the correct accessors depending on endianess */