Patchwork [U-Boot,v2] mxc: Fix SDHC multi-instance clock

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Submitter Benoît Thébaudeau
Date Oct. 1, 2012, 6:36 p.m.
Message ID <700502810.5864149.1349116585050.JavaMail.root@advansee.com>
Download mbox | patch
Permalink /patch/188329/
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Comments

Benoît Thébaudeau - Oct. 1, 2012, 6:36 p.m.
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
---
This patch should be applied after (series of series...):
http://patchwork.ozlabs.org/patch/187467/
http://patchwork.ozlabs.org/patch/187468/
http://patchwork.ozlabs.org/patch/187475/

This patch supersedes http://patchwork.ozlabs.org/patch/187476/ .

Changes for v2:
 - Since this patch will go to /next, extend the original patch with the mxc
   boards newly added to this branch: mx6qsabreauto and mx6qsabresd.

 .../board/esg/ima3-mx53/ima3-mx53.c                |    1 +
 .../board/freescale/mx35pdk/mx35pdk.c              |    2 ++
 .../board/freescale/mx51evk/mx51evk.c              |    4 ++++
 .../board/freescale/mx53ard/mx53ard.c              |    4 ++++
 .../board/freescale/mx53evk/mx53evk.c              |    4 ++++
 .../board/freescale/mx53loco/mx53loco.c            |    3 +++
 .../board/freescale/mx53smd/mx53smd.c              |    3 +++
 .../board/freescale/mx6qarm2/mx6qarm2.c            |    4 ++++
 .../board/freescale/mx6qsabreauto/mx6qsabreauto.c  |    1 +
 .../board/freescale/mx6qsabrelite/mx6qsabrelite.c  |    3 +++
 .../board/freescale/mx6qsabresd/mx6qsabresd.c      |    1 +
 .../board/genesi/mx51_efikamx/efikamx.c            |    4 ++++
 .../board/ttcontrol/vision2/vision2.c              |    2 ++
 .../drivers/mmc/fsl_esdhc.c                        |    5 +++--
 .../include/fsl_esdhc.h                            |    1 +
 15 files changed, 40 insertions(+), 2 deletions(-)
Benoît Thébaudeau - Oct. 9, 2012, 10:35 a.m.
Hi Stefano,

On Monday, October 1, 2012 8:36:25 PM, Benoît Thébaudeau wrote:
> On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is
> not
> suitable for the multi-instance use case (initialization made
> directly with
> fsl_esdhc_initialize()).
> 
> This patch fixes this issue by adding a configuration field for the
> SDHC input
> clock frequency.
> 
> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Eric Bénard <eric@eukrea.com>
> Cc: Otavio Salvador <otavio@ossystems.com.br>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Jason Liu <r64343@freescale.com>
> Cc: Matt Sealey <matt@genesi-usa.com>
> Cc: Andy Fleming <afleming@gmail.com>
> ---
> This patch should be applied after (series of series...):
> http://patchwork.ozlabs.org/patch/187467/
> http://patchwork.ozlabs.org/patch/187468/
> http://patchwork.ozlabs.org/patch/187475/
> 
> This patch supersedes http://patchwork.ozlabs.org/patch/187476/ .
> 
> Changes for v2:
>  - Since this patch will go to /next, extend the original patch with
>  the mxc
>    boards newly added to this branch: mx6qsabreauto and mx6qsabresd.

Did you forget to apply this patch (and
http://patchwork.ozlabs.org/patch/187468/ before it) when you applied my mx5 and
mx25 clock series, or is it just still in your TODO list?

If you could apply them before the Nitrogen6X series (in order to avoid a v3 of
this patch), I'd be grateful ;) . But if you need more review/test time, of
course no problem if this is not possible.

Best regards,
Benoît
Stefano Babic - Oct. 9, 2012, 10:58 a.m.
On 09/10/2012 12:35, Benoît Thébaudeau wrote:
> Hi Stefano,
> 
> On Monday, October 1, 2012 8:36:25 PM, Benoît Thébaudeau wrote:
>> On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is
>> not
>> suitable for the multi-instance use case (initialization made
>> directly with
>> fsl_esdhc_initialize()).
>>
>> This patch fixes this issue by adding a configuration field for the
>> SDHC input
>> clock frequency.
>>
>> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
>> Cc: Stefano Babic <sbabic@denx.de>
>> Cc: Eric Bénard <eric@eukrea.com>
>> Cc: Otavio Salvador <otavio@ossystems.com.br>
>> Cc: Fabio Estevam <fabio.estevam@freescale.com>
>> Cc: Jason Liu <r64343@freescale.com>
>> Cc: Matt Sealey <matt@genesi-usa.com>
>> Cc: Andy Fleming <afleming@gmail.com>
>> ---
>> This patch should be applied after (series of series...):
>> http://patchwork.ozlabs.org/patch/187467/
>> http://patchwork.ozlabs.org/patch/187468/
>> http://patchwork.ozlabs.org/patch/187475/
>>
>> This patch supersedes http://patchwork.ozlabs.org/patch/187476/ .
>>
>> Changes for v2:
>>  - Since this patch will go to /next, extend the original patch with
>>  the mxc
>>    boards newly added to this branch: mx6qsabreauto and mx6qsabresd.
> 
> Did you forget to apply this patch (and
> http://patchwork.ozlabs.org/patch/187468/ before it) when you applied my mx5 and
> mx25 clock series, or is it just still in your TODO list?

No, I did not forget. There are two patches for ESDHC. I wanted to be
sure that PowerPC boards are not broken and I have rechecked it this
morning. They are both ready in my queue to be merged.

> If you could apply them before the Nitrogen6X series (in order to avoid a v3 of
> this patch), I'd be grateful ;) . But if you need more review/test time, of
> course no problem if this is not possible.

I have some patches ready to be merged, but I sent also a pull request
for the -next branch, and it is not yet merged into arm-next. Anyway, I
can modify my pull request including further patches, too.

Best regards,
Stefano
Stefano Babic - Oct. 10, 2012, 11:29 a.m.
On 01/10/2012 20:36, Benoît Thébaudeau wrote:
> On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
> suitable for the multi-instance use case (initialization made directly with
> fsl_esdhc_initialize()).
> 
> This patch fixes this issue by adding a configuration field for the SDHC input
> clock frequency.
> 
> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Eric Bénard <eric@eukrea.com>
> Cc: Otavio Salvador <otavio@ossystems.com.br>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Jason Liu <r64343@freescale.com>
> Cc: Matt Sealey <matt@genesi-usa.com>
> Cc: Andy Fleming <afleming@gmail.com>
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

Patch

diff --git u-boot-imx-next-5cddb49.orig/board/esg/ima3-mx53/ima3-mx53.c u-boot-imx-next-5cddb49/board/esg/ima3-mx53/ima3-mx53.c
index e947330..41d6bb6 100644
--- u-boot-imx-next-5cddb49.orig/board/esg/ima3-mx53/ima3-mx53.c
+++ u-boot-imx-next-5cddb49/board/esg/ima3-mx53/ima3-mx53.c
@@ -217,6 +217,7 @@  int board_mmc_init(bd_t *bis)
 		PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_PULL |
 		PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
 
+	esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
 	return fsl_esdhc_initialize(bis, &esdhc_cfg);
 }
 #endif
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx35pdk/mx35pdk.c u-boot-imx-next-5cddb49/board/freescale/mx35pdk/mx35pdk.c
index 7cb6b30..a12531f 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx35pdk/mx35pdk.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx35pdk/mx35pdk.c
@@ -27,6 +27,7 @@ 
 #include <asm/errno.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/mx35_pins.h>
 #include <asm/arch/iomux.h>
 #include <i2c.h>
@@ -292,6 +293,7 @@  int board_mmc_init(bd_t *bis)
 	mxc_request_iomux(MX35_PIN_SD1_DATA2, MUX_CONFIG_FUNC);
 	mxc_request_iomux(MX35_PIN_SD1_DATA3, MUX_CONFIG_FUNC);
 
+	esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
 	return fsl_esdhc_initialize(bis, &esdhc_cfg);
 }
 
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx51evk/mx51evk.c u-boot-imx-next-5cddb49/board/freescale/mx51evk/mx51evk.c
index a94701c..3412952 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx51evk/mx51evk.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx51evk/mx51evk.c
@@ -29,6 +29,7 @@ 
 #include <asm/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
 #include <i2c.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
@@ -358,6 +359,9 @@  int board_mmc_init(bd_t *bis)
 	u32 index;
 	s32 status = 0;
 
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+	esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+
 	for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM;
 			index++) {
 		switch (index) {
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53ard/mx53ard.c u-boot-imx-next-5cddb49/board/freescale/mx53ard/mx53ard.c
index 08c7795..2fc8570 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx53ard/mx53ard.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx53ard/mx53ard.c
@@ -26,6 +26,7 @@ 
 #include <asm/arch/mx5x_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/errno.h>
 #include <netdev.h>
@@ -106,6 +107,9 @@  int board_mmc_init(bd_t *bis)
 	u32 index;
 	s32 status = 0;
 
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+	esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+
 	for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
 		switch (index) {
 		case 0:
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53evk/mx53evk.c u-boot-imx-next-5cddb49/board/freescale/mx53evk/mx53evk.c
index b11a94c..bb4621d 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx53evk/mx53evk.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx53evk/mx53evk.c
@@ -26,6 +26,7 @@ 
 #include <asm/arch/mx5x_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/errno.h>
 #include <asm/imx-common/boot_mode.h>
@@ -232,6 +233,9 @@  int board_mmc_init(bd_t *bis)
 	u32 index;
 	s32 status = 0;
 
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+	esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+
 	for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
 		switch (index) {
 		case 0:
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53loco/mx53loco.c u-boot-imx-next-5cddb49/board/freescale/mx53loco/mx53loco.c
index 6543209..20569a5 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx53loco/mx53loco.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx53loco/mx53loco.c
@@ -192,6 +192,9 @@  int board_mmc_init(bd_t *bis)
 	u32 index;
 	s32 status = 0;
 
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+	esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+
 	for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
 		switch (index) {
 		case 0:
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx53smd/mx53smd.c u-boot-imx-next-5cddb49/board/freescale/mx53smd/mx53smd.c
index 7f35ddd..761f727 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx53smd/mx53smd.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx53smd/mx53smd.c
@@ -26,6 +26,7 @@ 
 #include <asm/arch/mx5x_pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/errno.h>
 #include <netdev.h>
@@ -144,6 +145,8 @@  int board_mmc_init(bd_t *bis)
 	u32 index;
 	s32 status = 0;
 
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+
 	for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
 		switch (index) {
 		case 0:
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qarm2/mx6qarm2.c u-boot-imx-next-5cddb49/board/freescale/mx6qarm2/mx6qarm2.c
index d43b327..dad4b95 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qarm2/mx6qarm2.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx6qarm2/mx6qarm2.c
@@ -24,6 +24,7 @@ 
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
+#include <asm/arch/clock.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
@@ -139,6 +140,9 @@  int board_mmc_init(bd_t *bis)
 	s32 status = 0;
 	u32 index = 0;
 
+	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+
 	for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
 		switch (index) {
 		case 0:
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabreauto/mx6qsabreauto.c u-boot-imx-next-5cddb49/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 8913b21..1309fca 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -85,6 +85,7 @@  int board_mmc_init(bd_t *bis)
 {
 	imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
 
+	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
 }
 #endif
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabrelite/mx6qsabrelite.c u-boot-imx-next-5cddb49/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index d274d8c..23f1719 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -269,6 +269,9 @@  int board_mmc_init(bd_t *bis)
        s32 status = 0;
        u32 index = 0;
 
+	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+
        for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
 	       switch (index) {
 	       case 0:
diff --git u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabresd/mx6qsabresd.c u-boot-imx-next-5cddb49/board/freescale/mx6qsabresd/mx6qsabresd.c
index 03a6857..e02daa4 100644
--- u-boot-imx-next-5cddb49.orig/board/freescale/mx6qsabresd/mx6qsabresd.c
+++ u-boot-imx-next-5cddb49/board/freescale/mx6qsabresd/mx6qsabresd.c
@@ -120,6 +120,7 @@  int board_mmc_init(bd_t *bis)
 {
 	imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
 
+	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
 }
 #endif
diff --git u-boot-imx-next-5cddb49.orig/board/genesi/mx51_efikamx/efikamx.c u-boot-imx-next-5cddb49/board/genesi/mx51_efikamx/efikamx.c
index cfd2e93..e334c01 100644
--- u-boot-imx-next-5cddb49.orig/board/genesi/mx51_efikamx/efikamx.c
+++ u-boot-imx-next-5cddb49/board/genesi/mx51_efikamx/efikamx.c
@@ -29,6 +29,7 @@ 
 #include <asm/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
 #include <i2c.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
@@ -349,6 +350,9 @@  int board_mmc_init(bd_t *bis)
 		gpio_direction_input(EFIKASB_SDHC1_CD);
 	}
 
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+	esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+
 	ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
 
 	if (machine_is_efikasb()) {
diff --git u-boot-imx-next-5cddb49.orig/board/ttcontrol/vision2/vision2.c u-boot-imx-next-5cddb49/board/ttcontrol/vision2/vision2.c
index f28eab0..ba3307b 100644
--- u-boot-imx-next-5cddb49.orig/board/ttcontrol/vision2/vision2.c
+++ u-boot-imx-next-5cddb49/board/ttcontrol/vision2/vision2.c
@@ -28,6 +28,7 @@ 
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx5x_pins.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/gpio.h>
 #include <asm/arch/sys_proto.h>
@@ -590,6 +591,7 @@  int board_mmc_init(bd_t *bis)
 	mxc_iomux_set_pad(MX51_PIN_GPIO1_1,
 		PAD_CTL_HYS_ENABLE);
 
+	esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
 	return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
 }
 #endif
diff --git u-boot-imx-next-5cddb49.orig/drivers/mmc/fsl_esdhc.c u-boot-imx-next-5cddb49/drivers/mmc/fsl_esdhc.c
index 3f8d30d..aa6a9f1 100644
--- u-boot-imx-next-5cddb49.orig/drivers/mmc/fsl_esdhc.c
+++ u-boot-imx-next-5cddb49/drivers/mmc/fsl_esdhc.c
@@ -410,12 +410,12 @@  esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 	return 0;
 }
 
-void set_sysctl(struct mmc *mmc, uint clock)
+static void set_sysctl(struct mmc *mmc, uint clock)
 {
-	int sdhc_clk = gd->sdhc_clk;
 	int div, pre_div;
 	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
 	volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
+	int sdhc_clk = cfg->sdhc_clk;
 	uint clk;
 
 	if (clock < mmc->f_min)
@@ -598,6 +598,7 @@  int fsl_esdhc_mmc_init(bd_t *bis)
 	cfg = malloc(sizeof(struct fsl_esdhc_cfg));
 	memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
 	cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
+	cfg->sdhc_clk = gd->sdhc_clk;
 	return fsl_esdhc_initialize(bis, cfg);
 }
 
diff --git u-boot-imx-next-5cddb49.orig/include/fsl_esdhc.h u-boot-imx-next-5cddb49/include/fsl_esdhc.h
index 4e321e7..47d2fe4 100644
--- u-boot-imx-next-5cddb49.orig/include/fsl_esdhc.h
+++ u-boot-imx-next-5cddb49/include/fsl_esdhc.h
@@ -167,6 +167,7 @@ 
 
 struct fsl_esdhc_cfg {
 	u32	esdhc_base;
+	u32	sdhc_clk;
 };
 
 /* Select the correct accessors depending on endianess */