From patchwork Sun Sep 30 01:32:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [1/2] linux-user: ppc: mark as long long aligned Date: Sat, 29 Sep 2012 15:32:38 -0000 From: Alexander Graf X-Patchwork-Id: 188277 Message-Id: <1348968759-10913-1-git-send-email-agraf@suse.de> To: qemu-devel qemu-devel Cc: Peter Maydell , Riku Voipio , "qemu-ppc@nongnu.org List" The PPC32 ABI dictates that long long (64bit) parameters are pass in odd/even register pairs. Because unlike ARM and MIPS we start at an odd register number, we can reuse the same aligning code that ARM and MIPS use. Signed-off-by: Alexander Graf --- linux-user/syscall.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 1a38169..8cd56f2 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -587,12 +587,16 @@ extern int setfsgid(int); extern int setgroups(int, gid_t *); /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */ -#ifdef TARGET_ARM +#ifdef TARGET_ARM static inline int regpairs_aligned(void *cpu_env) { return ((((CPUARMState *)cpu_env)->eabi) == 1) ; } #elif defined(TARGET_MIPS) static inline int regpairs_aligned(void *cpu_env) { return 1; } +#elif defined(TARGET_PPC) && !defined(TARGET_PPC64) +/* PPC32 expects 64bit parameters to be passed on odd/even pairs of registers + which translates to the same as ARM/MIPS, because we start with r3 as arg1 */ +static inline int regpairs_aligned(void *cpu_env) { return 1; } #else static inline int regpairs_aligned(void *cpu_env) { return 0; } #endif