| Submitter | Ike Panhc |
|---|---|
| Date | Oct. 1, 2012, 10:03 a.m. |
| Message ID | <1349085821-23691-1-git-send-email-ike.pan@canonical.com> |
| Download | mbox | patch |
| Permalink | /patch/188267/ |
| State | New |
| Headers | show |
Comments
Patch
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index d1d60b6..101b968 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -851,7 +851,7 @@ config ARM_L1_CACHE_SHIFT config ARM_DMA_MEM_BUFFERABLE bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7 depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \ - MACH_REALVIEW_PB11MP || ARCH_HIGHBANK) + MACH_REALVIEW_PB11MP) default y if CPU_V6 || CPU_V6K || CPU_V7 help Historically, the kernel has used strongly ordered mappings to