From patchwork Thu Sep 27 23:41:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 187562 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CC7BC2C00B7 for ; Fri, 28 Sep 2012 09:41:54 +1000 (EST) Received: from localhost ([::1]:49126 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNiL-0000xC-0V for incoming@patchwork.ozlabs.org; Thu, 27 Sep 2012 19:41:53 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50081) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNiE-0000wN-6C for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:41:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1THNiD-0006IS-0b for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:41:46 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:47350) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNiC-0006IO-QI for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:41:44 -0400 Received: by pbbrp2 with SMTP id rp2so4316836pbb.4 for ; Thu, 27 Sep 2012 16:41:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=856TXQxdwO64kRQwc/C2slS+kQhJ55piuPLesDzL5Ek=; b=t8wDe3k4pwcnIrZhIjV7rMX77ImJ+PA3DgN5KTqkueYSirHNKPZk6GWb9w+kds2IaI S6dPrdL0sNJyJZAoWJPY3t1JYHDX0NQpnHVfcZE0RDx+OuXNMXVWlO1x1nBj29f9EshK Oapfki89XU+3tiuKdyZNfnYyjj2ePIEBA7OFTdYfvqDv0nHUlxYexl/zs9J2BODPhv6l mqBKoZgXmjfJQRo7rqU/WzOfbFF/FAIuY3u/idj+hCJPpdg4AXFi//RAdah4tvjBdpjj Gy+MNYqr0MXTrAnk9ERLSwhTnTSb224l8YRJ54UhACCoWHUf8+O7eNR4WprLT8PfQ40J KynQ== Received: by 10.66.83.9 with SMTP id m9mr13164998pay.22.1348789304117; Thu, 27 Sep 2012 16:41:44 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id it6sm4558575pbc.14.2012.09.27.16.41.43 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 27 Sep 2012 16:41:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 Sep 2012 16:41:40 -0700 Message-Id: <1348789300-24801-1-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1348785610-23418-1-git-send-email-rth@twiddle.net> References: <1348785610-23418-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 050/147] target-s390: Convert LOAD PSW X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 2 ++ target-s390x/translate.c | 41 +++++++++++++++++++++-------------------- 2 files changed, 23 insertions(+), 20 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 45c36c1..b0bee9b 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -379,6 +379,8 @@ D(0xa701, TMLL, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 0) #ifndef CONFIG_USER_ONLY +/* LOAD PSW */ + C(0x8200, LPSW, S, Z, 0, a2, 0, 0, lpsw, 0) /* SET ADDRESSING MODE */ /* We only do 64-bit, so accept this as a no-op. Let SAM24 and SAM31 signal illegal instruction. */ diff --git a/target-s390x/translate.c b/target-s390x/translate.c index bbdecab..ea876a0 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2356,26 +2356,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) switch (opc) { #ifndef CONFIG_USER_ONLY - case 0x82: /* LPSW D2(B2) [S] */ - /* Load PSW */ - check_privileged(s); - insn = ld_code4(env, s->pc); - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp2 = tcg_temp_new_i64(); - tmp3 = tcg_temp_new_i64(); - tcg_gen_qemu_ld32u(tmp2, tmp, get_mem_index(s)); - tcg_gen_addi_i64(tmp, tmp, 4); - tcg_gen_qemu_ld32u(tmp3, tmp, get_mem_index(s)); - /* Convert the 32-bit PSW_MASK into the 64-bit PSW_MASK. */ - tcg_gen_shli_i64(tmp2, tmp2, 32); - gen_helper_load_psw(cpu_env, tmp2, tmp3); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - tcg_temp_free_i64(tmp3); - /* we need to keep cc_op intact */ - s->is_jmp = DISAS_JUMP; - break; case 0x83: /* DIAG R1,R3,D2 [RS] */ /* Diagnose call (KVM hypercall) */ check_privileged(s); @@ -3511,6 +3491,27 @@ static ExitStatus op_ld64(DisasContext *s, DisasOps *o) return NO_EXIT; } +#ifndef CONFIG_USER_ONLY +static ExitStatus op_lpsw(DisasContext *s, DisasOps *o) +{ + TCGv_i64 t1, t2; + + check_privileged(s); + + t1 = tcg_temp_new_i64(); + t2 = tcg_temp_new_i64(); + tcg_gen_qemu_ld32u(t1, o->in2, get_mem_index(s)); + tcg_gen_addi_i64(o->in2, o->in2, 4); + tcg_gen_qemu_ld32u(t2, o->in2, get_mem_index(s)); + /* Convert the 32-bit PSW_MASK into the 64-bit PSW_MASK. */ + tcg_gen_shli_i64(t1, t1, 32); + gen_helper_load_psw(cpu_env, t1, t2); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); + return EXIT_NORETURN; +} +#endif + static ExitStatus op_mov2(DisasContext *s, DisasOps *o) { o->out = o->in2;