From patchwork Thu Sep 27 23:40:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 187560 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6CCA92C00B4 for ; Fri, 28 Sep 2012 09:40:54 +1000 (EST) Received: from localhost ([::1]:47078 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNhM-0008GP-55 for incoming@patchwork.ozlabs.org; Thu, 27 Sep 2012 19:40:52 -0400 Received: from eggs.gnu.org ([208.118.235.92]:49944) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNhC-0008FL-FT for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:40:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1THNhA-0005lh-VY for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:40:42 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:32874) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THNhA-0005kP-O1 for qemu-devel@nongnu.org; Thu, 27 Sep 2012 19:40:40 -0400 Received: by padfb10 with SMTP id fb10so1769454pad.4 for ; Thu, 27 Sep 2012 16:40:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=1z/2q+qMQ2llrTpay2GX0UWQz7bHF13leZOUTM50qMg=; b=KrP8xF7Dj406V2+zbbs/NEz3Q22bCrIHBkpk/OaOYK1pryJfXhDYM+08ZDPMDoSCOE HOsxSLVsHOSgRGV7Q8iX2BtiOq83YnH0vgWHZkKXSDSQe+EXKAcL39VWTIGZWyhJnqTc lFfIZCWy/iQUpS2fnLf4bHzAHyT/zlb0y3qACoAaI8jJXJZipjrd06KVHwSN2gSa56lf GFPGROXypXKyxLif1fNqhBoylCCKh9TRznEuJT/21LVrT6/J+VCqGd0TOHrJJmq7jvh0 4/wItcEN4uQSK8IiWcgHz56aeJfSfBL5w7ecBk1LkQRJHK1p1EehwSYOdO0k3E+T2I9L ZEUQ== Received: by 10.66.78.97 with SMTP id a1mr13169327pax.34.1348789239947; Thu, 27 Sep 2012 16:40:39 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id w10sm1617962paz.22.2012.09.27.16.40.38 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 27 Sep 2012 16:40:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 Sep 2012 16:40:36 -0700 Message-Id: <1348789236-24758-1-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1348785610-23418-1-git-send-email-rth@twiddle.net> References: <1348785610-23418-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.220.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 049/147] target-s390: Convert SET SYSTEM MASK X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 2 ++ target-s390x/translate.c | 25 +++++++++---------------- 2 files changed, 11 insertions(+), 16 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index c5c5614..45c36c1 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -383,4 +383,6 @@ /* We only do 64-bit, so accept this as a no-op. Let SAM24 and SAM31 signal illegal instruction. */ C(0x010e, SAM64, E, Z, 0, 0, 0, 0, 0, 0) +/* SET SYSTEM MASK */ + C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0) #endif /* CONFIG_USER_ONLY */ diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 0af507b..bbdecab 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2356,22 +2356,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) switch (opc) { #ifndef CONFIG_USER_ONLY - case 0x80: /* SSM D2(B2) [S] */ - /* Set System Mask */ - check_privileged(s); - insn = ld_code4(env, s->pc); - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp2 = tcg_temp_new_i64(); - tmp3 = tcg_temp_new_i64(); - tcg_gen_andi_i64(tmp3, psw_mask, ~0xff00000000000000ULL); - tcg_gen_qemu_ld8u(tmp2, tmp, get_mem_index(s)); - tcg_gen_shli_i64(tmp2, tmp2, 56); - tcg_gen_or_i64(psw_mask, tmp3, tmp2); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - tcg_temp_free_i64(tmp3); - break; case 0x82: /* LPSW D2(B2) [S] */ /* Load PSW */ check_privileged(s); @@ -3607,6 +3591,15 @@ static ExitStatus op_ori(DisasContext *s, DisasOps *o) return NO_EXIT; } +#ifndef CONFIG_USER_ONLY +static ExitStatus op_ssm(DisasContext *s, DisasOps *o) +{ + check_privileged(s); + tcg_gen_deposit_i64(psw_mask, psw_mask, o->in2, 56, 8); + return NO_EXIT; +} +#endif + static ExitStatus op_st8(DisasContext *s, DisasOps *o) { tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s));