From patchwork Thu Sep 27 18:43:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 187444 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2DF032C00B6 for ; Fri, 28 Sep 2012 04:44:14 +1000 (EST) Received: from localhost ([::1]:46836 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THJ4G-0003YK-CH for incoming@patchwork.ozlabs.org; Thu, 27 Sep 2012 14:44:12 -0400 Received: from eggs.gnu.org ([208.118.235.92]:53614) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THJ46-0003Xx-9l for qemu-devel@nongnu.org; Thu, 27 Sep 2012 14:44:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1THJ45-00077T-7a for qemu-devel@nongnu.org; Thu, 27 Sep 2012 14:44:02 -0400 Received: from isrv.corpit.ru ([86.62.121.231]:34772) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THJ44-00077N-Ra for qemu-devel@nongnu.org; Thu, 27 Sep 2012 14:44:01 -0400 Received: from [192.168.88.2] (mjt.vpn.tls.msk.ru [192.168.177.99]) by isrv.corpit.ru (Postfix) with ESMTP id 2BB3EA1D12; Thu, 27 Sep 2012 22:43:59 +0400 (MSK) Message-ID: <50649E6D.4050102@msgid.tls.msk.ru> Date: Thu, 27 Sep 2012 22:43:57 +0400 From: Michael Tokarev Organization: Telecom Service, JSC User-Agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:10.0.6esrpre) Gecko/20120817 Icedove/10.0.6 MIME-Version: 1.0 To: Jan Kiszka References: <20120927142751.28864.67471.reportbug@gimli.ponomarevs.fi> <50646F5F.7080703@msgid.tls.msk.ru> <50647E08.7050606@gmail.com> <506489CD.8080605@msgid.tls.msk.ru> <50649ABA.8020104@siemens.com> In-Reply-To: <50649ABA.8020104@siemens.com> X-Enigmail-Version: 1.4.1 OpenPGP: id=804465C5 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 86.62.121.231 Cc: "Michael S. Tsirkin" , Gerd Hoffmann , "688964@bugs.debian.org" <688964@bugs.debian.org>, Nikolai Kondrashov , qemu-devel Subject: Re: [Qemu-devel] Bug#688964: qemu-kvm: Fedora 17 guest hangs on boot with soft lockup in udevd X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On 27.09.2012 22:28, Jan Kiszka wrote: [] >> --- a/hw/intel-hda.c >> +++ b/hw/intel-hda.c >> @@ -1107,6 +1107,9 @@ static void intel_hda_reset(DeviceState *dev) >> DeviceState *qdev; >> HDACodecDevice *cdev; >> >> + if (d->msi) { >> + msi_reset(&d->pci); >> + } >> intel_hda_regs_reset(d); >> d->wall_base_ns = qemu_get_clock_ns(vm_clock); >> >> which is exactly about this hda thing. I'm CC'ing relevant >> people here. > > I suppose we are resetting the MSI configuration also in cases here > where only the HDA internals are supposed to be reset (when called from > intel_hda_set_g_ctl). Hmm. I was looking at this code already (but i don't know the machinery anyway). Here it is (I addedd two printfs in obvious places): in intel_hda_reset calling intel_hda_reset from intel_hda_set_g_ctl in intel_hda_reset (at this time it hangs in guest). The following patch fixes it. Is it correct? :) /mjt diff --git a/hw/intel-hda.c b/hw/intel-hda.c index e38861e..fdd7eeb 100644 --- a/hw/intel-hda.c +++ b/hw/intel-hda.c @@ -199,7 +199,7 @@ struct IntelHDAReg { void (*rhandler)(IntelHDAState *d, const IntelHDAReg *reg); }; -static void intel_hda_reset(DeviceState *dev); +static void intel_hda_reset_dev(DeviceState *dev); /* --------------------------------------------------------------------- */ @@ -500,7 +500,7 @@ static void intel_hda_notify_codecs(IntelHDAState *d, uint32_t stream, bool runn static void intel_hda_set_g_ctl(IntelHDAState *d, const IntelHDAReg *reg, uint32_t old) { if ((d->g_ctl & ICH6_GCTL_RESET) == 0) { - intel_hda_reset(&d->pci.qdev); + intel_hda_reset_dev(&d->pci.qdev); } } @@ -1101,15 +1101,12 @@ static const MemoryRegionOps intel_hda_mmio_ops = { /* --------------------------------------------------------------------- */ -static void intel_hda_reset(DeviceState *dev) +static void intel_hda_reset_dev(DeviceState *dev) { IntelHDAState *d = DO_UPCAST(IntelHDAState, pci.qdev, dev); DeviceState *qdev; HDACodecDevice *cdev; - if (d->msi) { - msi_reset(&d->pci); - } intel_hda_regs_reset(d); d->wall_base_ns = qemu_get_clock_ns(vm_clock); @@ -1122,6 +1119,15 @@ static void intel_hda_reset(DeviceState *dev) intel_hda_update_irq(d); } +static void intel_hda_reset(DeviceState *dev) +{ + IntelHDAState *d = DO_UPCAST(IntelHDAState, pci.qdev, dev); + if (d->msi) { + msi_reset(&d->pci); + } + intel_hda_reset_dev(dev); +} + static int intel_hda_init(PCIDevice *pci) { IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci);