From patchwork Thu Sep 27 17:19:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 187416 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E0C4B2C007C for ; Fri, 28 Sep 2012 03:25:27 +1000 (EST) Received: from localhost ([::1]:43068 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THHq2-00059W-2K for incoming@patchwork.ozlabs.org; Thu, 27 Sep 2012 13:25:26 -0400 Received: from eggs.gnu.org ([208.118.235.92]:54737) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THHpu-00058W-4l for qemu-devel@nongnu.org; Thu, 27 Sep 2012 13:25:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1THHpp-0004zr-PM for qemu-devel@nongnu.org; Thu, 27 Sep 2012 13:25:17 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:39647) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THHpp-0004ys-HV for qemu-devel@nongnu.org; Thu, 27 Sep 2012 13:25:13 -0400 Received: by pbbrp2 with SMTP id rp2so3912471pbb.4 for ; Thu, 27 Sep 2012 10:25:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=QN8DpBOxDzw5xtXAOXXm9G/vcWKHRhT1XabjerkmHpc=; b=uRrpCTgNkvDsnk3sVXBO/h0iNK/YpdIJuF2UQKMXkZSV7Ka7SQa8Tla/j9qsmySTi2 MUjO8BkKdyja81tPBF5AXVhaBGrzyujalQ1PMOullFC4g+A9fcG+ef1EPHHeXnsf+Auy QudH8Zt+XZYOw8sQCPS4GReMZr1pAjsobjG2CvpXt92WLnjtIvhs4QpjpBvj0GsqIHXl a6tc0YlpVeZuDul7igEVu7lVxXtLCiRX/ZyJnY8PxPbk9CR8Kiy4Rfl+T3xYsrJbqQ2q 3qnaWZS8xnqjuRSHeR0wx+Q5JIrGotO60EUyudMQyNzl24VxsQDlF6BvLwHf8FyNqMyB x4FQ== Received: by 10.68.240.66 with SMTP id vy2mr13207508pbc.73.1348766409082; Thu, 27 Sep 2012 10:20:09 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id jw14sm4118581pbb.36.2012.09.27.10.20.08 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 27 Sep 2012 10:20:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 27 Sep 2012 10:19:52 -0700 Message-Id: <1348766397-20731-3-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1348766397-20731-1-git-send-email-rth@twiddle.net> References: <1348766397-20731-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH 2/7] tcg: Optimize add2 + sub2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We can't do complete constant folding because we lack "mov2", or the ability to insert opcodes in the stream. But we can at least canonicalize add2 operand ordering and simplify add2 to add when the lowpart adds a constant 0. Signed-off-by: Richard Henderson --- tcg/optimize.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index 55f2a24..004c336 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -470,6 +470,11 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, if (swap_commutative(args[0], &args[4], &args[3])) { args[5] = tcg_invert_cond(args[5]); } + break; + case INDEX_op_add2_i32: + swap_commutative(args[0], &args[2], &args[4]); + swap_commutative(args[1], &args[3], &args[5]); + break; default: break; } @@ -522,6 +527,32 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, continue; } break; + case INDEX_op_add2_i32: + case INDEX_op_sub2_i32: + /* Simplify op rl, rh, al, ah, 0, bh => op rh, ah, bh. + The zero implies there will be no carry into the high part. + But only when rl == al, since we can't insert the extra move + that would be required. */ + if (temps[args[4]].state == TCG_TEMP_CONST + && temps[args[4]].val == 0 + && temps_are_copies(args[0], args[2])) { + if (temps[args[5]].state == TCG_TEMP_CONST + && temps[args[5]].val == 0 + && temps_are_copies(args[1], args[3])) { + gen_opc_buf[op_index] = INDEX_op_nop; + } else { + gen_opc_buf[op_index] = (op == INDEX_op_add2_i32 + ? INDEX_op_add_i32 + : INDEX_op_sub_i32); + args[0] = args[1]; + args[1] = args[3]; + args[2] = args[5]; + gen_args += 3; + } + args += 6; + continue; + } + break; default: break; }