From patchwork Wed Sep 26 23:15:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 187240 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5E15F2C00A2 for ; Thu, 27 Sep 2012 09:17:08 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TH0pu-0007w9-NX; Wed, 26 Sep 2012 23:16:10 +0000 Received: from mail-pa0-f49.google.com ([209.85.220.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TH0ps-0007vl-5c for linux-mtd@lists.infradead.org; Wed, 26 Sep 2012 23:16:08 +0000 Received: by padbi5 with SMTP id bi5so871998pad.36 for ; Wed, 26 Sep 2012 16:16:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer; bh=Yq9I+MVe7y+6wSv1pnyR/C0nGCpxfPJOvFkCemydJmE=; b=zhmoSbgRsD5RA2BRVSBpTglY10+Yyi+IQLGYL9iTKfM11YO/9Qqb6zeKrBn1Ki1u9w qrl7Uw6Vx205UWFks+Z9ffKAsI8BHYGEqPvG0M0HCeMzYA9B+JIXOMkXH77OOG+R0jMS BtAcij0BNf0iWy2XFqlaqTw4gW7QtzFTRgD85NPwMweVcTRaxunlHVq7IO34s4M80txn zRJuG0kOQzXF2THbVnJXJ1EtbSNBd57Aqj2BUNYatFVI9ENVNSfSp1wbh1+jY4QBCLuQ nzDdVYjPXi+QArc9dLmlitWr64H6XQP4LrUHWWj+62zKH4EC3oGqCVCj3MrGUuaMM9ng lBqg== Received: by 10.66.9.2 with SMTP id v2mr4796345paa.65.1348701366422; Wed, 26 Sep 2012 16:16:06 -0700 (PDT) Received: from ld-irv-0074.broadcom.com (5520-maca-inet1-outside.broadcom.com. [216.31.211.11]) by mx.google.com with ESMTPS id tt6sm2750138pbc.51.2012.09.26.16.16.04 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 26 Sep 2012 16:16:05 -0700 (PDT) From: Brian Norris To: Subject: [PATCH] mtd: fsl_elbc_nand: remove unnecessary badblock_pattern Date: Wed, 26 Sep 2012 16:15:27 -0700 Message-Id: <1348701327-12226-1-git-send-email-computersforpeace@gmail.com> X-Mailer: git-send-email 1.7.11.3 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (computersforpeace[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Scott Wood , Brian Norris , David Woodhouse , Artem Bityutskiy X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Since the introduction of nand_create_default_bbt_descr() (now known as nand_create_badblock_pattern()) in commit 58373ff0afff4cc8ac40608872995f4d87eb72ec nand_chip.badblock_pattern will be dynamically calculated to the same 1-byte-length pattern that is required by fsl_elbc_nand. This custom badblock_pattern is no longer needed, then, and its removal may help facilitate further nand_bbt.c/nand_base.c cleanup in the future (one down, many to go?) Anyway, with nand_bbt.c fixed, this effectively reverts: commit 452db2724351ff3d9416a183a7955e00ab4e6ab4 [MTD] [NAND] fsl_elbc_nand: fix OOB workability for large page NAND chips Signed-off-by: Brian Norris Cc: Scott Wood --- Not even compile-tested... drivers/mtd/nand/fsl_elbc_nand.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index cc1480a..4c4d3e5 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -109,20 +109,6 @@ static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = { }; /* - * fsl_elbc_oob_lp_eccm* specify that LP NAND's OOB free area starts at offset - * 1, so we have to adjust bad block pattern. This pattern should be used for - * x8 chips only. So far hardware does not support x16 chips anyway. - */ -static u8 scan_ff_pattern[] = { 0xff, }; - -static struct nand_bbt_descr largepage_memorybased = { - .options = 0, - .offs = 0, - .len = 1, - .pattern = scan_ff_pattern, -}; - -/* * ELBC may use HW ECC, so that OOB offsets, that NAND core uses for bbt, * interfere with ECC positions, that's why we implement our own descriptors. * OOB {11, 5}, works for both SP and LP chips, with ECCM = 1 and ECCM = 0. @@ -699,7 +685,6 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) chip->ecc.layout = (priv->fmr & FMR_ECCM) ? &fsl_elbc_oob_lp_eccm1 : &fsl_elbc_oob_lp_eccm0; - chip->badblock_pattern = &largepage_memorybased; } } else { dev_err(priv->dev,