From patchwork Wed Sep 26 20:32:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 187203 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B89682C00A0 for ; Thu, 27 Sep 2012 06:39:05 +1000 (EST) Received: from localhost ([::1]:45324 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGyNr-0007rt-St for incoming@patchwork.ozlabs.org; Wed, 26 Sep 2012 16:39:03 -0400 Received: from eggs.gnu.org ([208.118.235.92]:58950) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGyNi-0007rc-Tp for qemu-devel@nongnu.org; Wed, 26 Sep 2012 16:38:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TGyNh-0006YC-Cs for qemu-devel@nongnu.org; Wed, 26 Sep 2012 16:38:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:14504) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGyNh-0006Y6-4p for qemu-devel@nongnu.org; Wed, 26 Sep 2012 16:38:53 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q8QKXkYA003659 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 26 Sep 2012 16:33:46 -0400 Received: from dell-pet610-01.lab.eng.brq.redhat.com (dell-pet610-01.lab.eng.brq.redhat.com [10.34.42.20]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q8QKXMmG024195; Wed, 26 Sep 2012 16:33:43 -0400 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 26 Sep 2012 22:32:43 +0200 Message-Id: <1348691578-17231-8-git-send-email-imammedo@redhat.com> In-Reply-To: <1348691578-17231-1-git-send-email-imammedo@redhat.com> References: <1348691578-17231-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: aliguori@us.ibm.com, ehabkost@redhat.com, jan.kiszka@siemens.com, Don@CloudSwitch.com, mtosatti@redhat.com, mdroth@linux.vnet.ibm.com, blauwirbel@gmail.com, pbonzini@redhat.com, lersek@redhat.com, afaerber@suse.de, stefanha@linux.vnet.ibm.com Subject: [Qemu-devel] [PATCH 07/22] target-i386: convert cpuid features into properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org add property accessors for cpuid feature bits defined by *_feature_name arrays. Signed-off-by: Igor Mammedov --- v2: * replaced mask/ffs tricks by plain 'for (bit = 0; bit < 32; bit++)' as suggested by Eduardo Habkost v3: * check if property exists before adding it * rebased on top of "i386: cpu: remove duplicate feature names" http://www.mail-archive.com/qemu-devel@nongnu.org/msg129458.html place ext2_feature_name for AMD case into setter, so that not to clutter x86_cpu_realize() with property specific code. * fix for convert cpuid features --- target-i386/cpu.c | 114 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 114 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index a713960..213368b 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -833,6 +833,114 @@ static int check_features_against_host(x86_def_t *guest_def) return rv; } +static bool is_feature_set(const char *name, const uint32_t featbitmap, + const char **featureset) +{ + uint32_t bit; + + for (bit = 0; bit < 32; ++bit) { + if (featureset[bit] && !altcmp(name, NULL, featureset[bit])) { + if (featbitmap & (1 << bit)) { + return true; + } + } + } + return false; +} + +static void x86_cpuid_get_feature(Object *obj, Visitor *v, void *opaque, + const char *name, Error **errp) +{ + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + bool value = true; + + if (!is_feature_set(name, env->cpuid_features, feature_name) && + !is_feature_set(name, env->cpuid_ext_features, ext_feature_name) && + !is_feature_set(name, env->cpuid_ext2_features, ext2_feature_name) && + !is_feature_set(name, env->cpuid_ext3_features, ext3_feature_name) && + !is_feature_set(name, env->cpuid_kvm_features, kvm_feature_name) && + !is_feature_set(name, env->cpuid_svm_features, svm_feature_name)) { + value = false; + } + + visit_type_bool(v, &value, name, errp); +} + +static void x86_cpuid_set_feature(Object *obj, Visitor *v, void *opaque, + const char *name, Error **errp) +{ + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + uint32_t mask = 0; + uint32_t *dst_features; + bool value; + + visit_type_bool(v, &value, name, errp); + if (error_is_set(errp)) { + return; + } + + if (lookup_feature(&mask, name, NULL, feature_name)) { + dst_features = &env->cpuid_features; + } else if (lookup_feature(&mask, name, NULL, ext_feature_name)) { + dst_features = &env->cpuid_ext_features; + } else if (lookup_feature(&mask, name, NULL, ext2_feature_name)) { + dst_features = &env->cpuid_ext2_features; + } else if (lookup_feature(&mask, name, NULL, ext3_feature_name)) { + dst_features = &env->cpuid_ext3_features; + } else if (lookup_feature(&mask, name, NULL, kvm_feature_name)) { + dst_features = &env->cpuid_kvm_features; + } else if (lookup_feature(&mask, name, NULL, svm_feature_name)) { + dst_features = &env->cpuid_svm_features; + } else { + error_set(errp, QERR_PROPERTY_NOT_FOUND, "", name); + return; + } + + if (value) { + *dst_features |= mask; + } else { + *dst_features &= ~mask; + } + + /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on + * CPUID[1].EDX. + */ + if (dst_features == &env->cpuid_features && + env->cpuid_vendor1 == CPUID_VENDOR_AMD_1 && + env->cpuid_vendor2 == CPUID_VENDOR_AMD_2 && + env->cpuid_vendor3 == CPUID_VENDOR_AMD_3) { + env->cpuid_ext2_features &= ~CPUID_EXT2_AMD_ALIASES; + env->cpuid_ext2_features |= *dst_features & CPUID_EXT2_AMD_ALIASES; + } +} + +static void x86_register_cpuid_properties(Object *obj, const char **featureset) +{ + uint32_t bit; + + for (bit = 0; bit < 32; ++bit) { + if (featureset[bit]) { + char *feature_name, *save_ptr; + char buf[32]; + if (strlen(featureset[bit]) > sizeof(buf) - 1) { + abort(); + } + pstrcpy(buf, sizeof(buf), featureset[bit]); + feature_name = strtok_r(buf, "|", &save_ptr); + while (feature_name) { + if (!object_property_find(obj, feature_name, NULL)) { + object_property_add(obj, feature_name, "bool", + x86_cpuid_get_feature, + x86_cpuid_set_feature, NULL, NULL, NULL); + } + feature_name = strtok_r(NULL, "|", &save_ptr); + } + } + } +} + static void x86_cpuid_version_get_family(Object *obj, Visitor *v, void *opaque, const char *name, Error **errp) { @@ -1920,6 +2028,12 @@ static void x86_cpu_initfn(Object *obj) object_property_add(obj, "tsc-frequency", "int", x86_cpuid_get_tsc_freq, x86_cpuid_set_tsc_freq, NULL, NULL, NULL); + x86_register_cpuid_properties(obj, feature_name); + x86_register_cpuid_properties(obj, ext_feature_name); + x86_register_cpuid_properties(obj, ext2_feature_name); + x86_register_cpuid_properties(obj, ext3_feature_name); + x86_register_cpuid_properties(obj, kvm_feature_name); + x86_register_cpuid_properties(obj, svm_feature_name); env->cpuid_apic_id = env->cpu_index;