From patchwork Wed Sep 26 15:30:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mjr@cs.wisc.edu X-Patchwork-Id: 187096 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 81E072C0096 for ; Thu, 27 Sep 2012 01:36:07 +1000 (EST) Received: from localhost ([::1]:55867 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGted-00013D-S3 for incoming@patchwork.ozlabs.org; Wed, 26 Sep 2012 11:36:03 -0400 Received: from eggs.gnu.org ([208.118.235.92]:38076) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGteV-000134-Gl for qemu-devel@nongnu.org; Wed, 26 Sep 2012 11:35:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TGteO-00039H-N6 for qemu-devel@nongnu.org; Wed, 26 Sep 2012 11:35:55 -0400 Received: from sabe.cs.wisc.edu ([128.105.6.20]:41028) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGteO-00034G-BT for qemu-devel@nongnu.org; Wed, 26 Sep 2012 11:35:48 -0400 Received: from localhost.localdomain (cpe-184-58-210-31.wi.res.rr.com [184.58.210.31]) (authenticated bits=0) by sabe.cs.wisc.edu (8.14.1/8.14.1) with ESMTP id q8QFX0N9022505 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 26 Sep 2012 10:35:45 -0500 From: mjr@cs.wisc.edu To: qemu-devel@nongnu.org Date: Wed, 26 Sep 2012 10:30:53 -0500 Message-Id: <1348673453-3248-1-git-send-email-mjr@cs.wisc.edu> X-Mailer: git-send-email 1.7.5.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 128.105.6.20 Cc: alex.williamson@redhat.com Subject: [Qemu-devel] [PATCH v3] Align PCI capabilities in pci_find_space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Matt Renzelmann The current implementation of pci_find_space does not correctly align PCI capabilities in the PCI configuration space. It also does not distinguish PCI and PCI-Express devices. This patch fixes these issues. Thanks to Alex Williamson for continuing feedback. Signed-off-by: Matt Renzelmann --- In this patch, I've revised the pci_find_space function as suggested (more-or-less). I searched for calls to pci_add_capability, and at this time, most rely only on capabilities that fit in the PCI config space. More importantly, almost all specify the capability offset instead of relying on pci_find_space, so this change does not impact any calls that specify an offset manually. However, it's important to double-check that there are no calls from PCI-E virtual devices to pci_add_capability that both: (a) relied on pci_find_space to find them space (b) needed the PCI-E extended config space searched in addition to the PCI space as these would break with this patch. Here is the list of files that refer to pcie_cap_init: ./hw/pcie.c ./hw/pcie.h ./hw/ioh3420.c ./hw/usb/hcd-xhci.c ./hw/xio3130_upstream.c ./hw/xio3130_downstream.c The goal of this search was simply to find PCI-E devices--there may be a better way. The next list contain calls to pci_add_capability: ./hw/pci_bridge.c ./hw/shpc.c ./hw/pcie.c ./hw/kvm/pci-assign.c ./hw/msi.c ./hw/pci.c ./hw/ide/ich.c ./hw/pci.h ./hw/eepro100.c ./hw/msix.c ./hw/slotid_cap.c hw/pci.c | 28 +++++++++++++++++++++------- 1 files changed, 21 insertions(+), 7 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index f855cf3..2217dda 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -1626,16 +1626,30 @@ PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name) return pci_create_simple_multifunction(bus, devfn, false, name); } -static int pci_find_space(PCIDevice *pdev, uint8_t size) +static int pci_find_space(PCIDevice *pdev, uint8_t size, bool include_pcie) { - int config_size = pci_config_size(pdev); + int config_size; int offset = PCI_CONFIG_HEADER_SIZE; int i; - for (i = PCI_CONFIG_HEADER_SIZE; i < config_size; ++i) - if (pdev->used[i]) - offset = i + 1; - else if (i - offset + 1 == size) + uint32_t *dword_used = &pdev->used[PCI_CONFIG_HEADER_SIZE]; + + if (include_pcie) { + assert (pci_config_size(pdev) >= PCIE_CONFIG_SPACE_SIZE); + config_size = PCIE_CONFIG_SPACE_SIZE; + } else { + config_size = PCI_CONFIG_SPACE_SIZE; + } + + /* This approach ensures the capability is dword-aligned, as + required by the PCI specification */ + for (i = PCI_CONFIG_HEADER_SIZE; i < config_size; i += 4, dword_used++) { + if (*dword_used) { + offset = i + 4; + } else if (i - offset + 4 >= size) { return offset; + } + } + return 0; } @@ -1826,7 +1840,7 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, int i, overlapping_cap; if (!offset) { - offset = pci_find_space(pdev, size); + offset = pci_find_space(pdev, size, false); if (!offset) { return -ENOSPC; }