From patchwork Mon Sep 24 20:44:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 186561 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B5B332C008E for ; Tue, 25 Sep 2012 06:45:26 +1000 (EST) Received: from localhost ([::1]:35105 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGFWu-0005dK-Os for incoming@patchwork.ozlabs.org; Mon, 24 Sep 2012 16:45:24 -0400 Received: from eggs.gnu.org ([208.118.235.92]:59343) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGFWj-0005aJ-9O for qemu-devel@nongnu.org; Mon, 24 Sep 2012 16:45:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TGFWi-00041W-61 for qemu-devel@nongnu.org; Mon, 24 Sep 2012 16:45:13 -0400 Received: from mail-qc0-f173.google.com ([209.85.216.173]:53652) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TGFWi-000418-1X for qemu-devel@nongnu.org; Mon, 24 Sep 2012 16:45:12 -0400 Received: by qcab12 with SMTP id b12so1440685qca.4 for ; Mon, 24 Sep 2012 13:45:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=bgRheK1Rgcydu9p3NnQAuiN4SxydmGvJ8rO5cCklNf0=; b=S/4gMqn06i539NYGD5wWM81NJn8xvc17YiUJEC7mAQLiQrODKuJ39QWlGQ3zgby+Xc b56cGQX+A0mI51koSsluMJsAcllE6QG3WdqwPc/xmgjd9MR7vJkYgflk4Dmv7o6PhCyi IiM4vyQks2NyU7JYv6CYcshBgxkU23hHW1It0BFepULnG9YDpQ/oSi4rApbwk+HKCm0u HvLTtGoRm43+ggxErZGyra0unCGL4vuaBydoSIJ+0i5xqRlwFcFEMmvg+IgB+uoAN98P fpSezFOzUTQBdx4IR6mALiXpzv7M1d6yJukMmDgmgz53faDspBVl2dCj9eMUUjfErpob h9EA== Received: by 10.224.19.80 with SMTP id z16mr34936892qaa.74.1348519511497; Mon, 24 Sep 2012 13:45:11 -0700 (PDT) Received: from anchor.twiddle.home.com ([173.160.232.49]) by mx.google.com with ESMTPS id h8sm26886554qap.16.2012.09.24.13.45.10 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 24 Sep 2012 13:45:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 24 Sep 2012 13:44:59 -0700 Message-Id: <1348519500-16488-2-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1348519500-16488-1-git-send-email-rth@twiddle.net> References: <1348519500-16488-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.216.173 Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 1/2] tcg: Streamline movcond_i64 using 32-bit arithmetic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Avoiding 64-bit arithmetic (outside of the compare) reduces the generated op count from 15 to 12, and the generated code size on i686 from 105 to 88 bytes. Signed-off-by: Richard Henderson --- tcg/tcg-op.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 6d28f82..c32646e 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -2141,6 +2141,25 @@ static inline void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1, TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2) { +#if TCG_TARGET_REG_BITS == 32 + TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t1 = tcg_temp_new_i32(); + tcg_gen_op6i_i32(INDEX_op_setcond2_i32, t0, + TCGV_LOW(c1), TCGV_HIGH(c1), + TCGV_LOW(c2), TCGV_HIGH(c2), cond); + tcg_gen_neg_i32(t0, t0); + + tcg_gen_and_i32(t1, TCGV_LOW(v1), t0); + tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(v2), t0); + tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t1); + + tcg_gen_and_i32(t1, TCGV_HIGH(v1), t0); + tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(v2), t0); + tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t1); + + tcg_temp_free_i32(t0); + tcg_temp_free_i32(t1); +#else if (TCG_TARGET_HAS_movcond_i64) { tcg_gen_op6i_i64(INDEX_op_movcond_i64, ret, c1, c2, v1, v2, cond); } else { @@ -2154,6 +2173,7 @@ static inline void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, tcg_temp_free_i64(t0); tcg_temp_free_i64(t1); } +#endif } /***************************************/