From patchwork Mon Sep 24 09:18:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peter A. G. Crosthwaite" X-Patchwork-Id: 186353 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BCA532C0085 for ; Mon, 24 Sep 2012 19:48:27 +1000 (EST) Received: from localhost ([::1]:46150 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TG4qL-0006kv-7u for incoming@patchwork.ozlabs.org; Mon, 24 Sep 2012 05:20:45 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57411) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TG4p6-0003Dc-Rg for qemu-devel@nongnu.org; Mon, 24 Sep 2012 05:19:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TG4p2-0002g5-6r for qemu-devel@nongnu.org; Mon, 24 Sep 2012 05:19:28 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:48792) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TG4p2-0002bX-0D for qemu-devel@nongnu.org; Mon, 24 Sep 2012 05:19:24 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so896912pbb.4 for ; Mon, 24 Sep 2012 02:19:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references:x-gm-message-state; bh=B6CLX6cKPlJtLRGap7BBMtyLFzOI1dJLYb6Di0MMX0M=; b=VZ2mKASPTbylqQAowRkD9+DMXBps7A0KE1GJOVkTnDCqmvf/AK5QHoNM34+J9Pdd/4 ihibQUV2bryRiCKkV0oXMhBPxNOpGkKEcJcBMatXO8OArsNz82hAhpeQ7obH3jl/kK88 vRq8k3SZ5J60haJrjaZ+fT7PD9Bph0BZd4XxQnnMZMK2qXEd8JCw/n//8Q3qUp1JmzeD GxKDhpPxdK4TWJHUZBSDIJWxZJ5b0e6SrvqZoDnXN5ZX5qnMcufi6JRXsC9+PFzFmq52 8YRGmOkaOC3G3wsxlNkVEdmrcMWeMTY5kBKK8HxN8CQQ4SBH7lY6w4FxRlEmviJc+/z0 Ah4A== Received: by 10.66.83.9 with SMTP id m9mr31009776pay.22.1348478363651; Mon, 24 Sep 2012 02:19:23 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id uh7sm9369549pbc.35.2012.09.24.02.19.20 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 24 Sep 2012 02:19:23 -0700 (PDT) From: "Peter A. G. Crosthwaite" To: qemu-devel@nongnu.org, paul@codesourcery.com, edgar.iglesias@gmail.com, peter.maydell@linaro.org, stefanha@gmail.com Date: Mon, 24 Sep 2012 19:18:35 +1000 Message-Id: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQmMpZP5gVHYIdJdtC8aYUQQdwgV9XYOBT1w2PEzbXG8jIN/b9HKD+IFGX5Vev5qnMntyWNs X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: blauwirbel@gmail.com, "Peter A. G. Crosthwaite" , i.mitsyanko@samsung.com Subject: [Qemu-devel] [PATCH v7 05/13] hw/stellaris: Removed gpio_out init array. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org stellaris_init() defines arrays of qemu_irq to decides what each of the GPIO pins are connected to. This is ok for inputs (as an input can only have one source) but is flawed for outputs as an output can connect to any number of sinks. Removed the gpio_out array completely and just replaced its setters with direct calls to qdev_connect_gpio_out(). Signed-off-by: Peter A. G. Crosthwaite --- hw/stellaris.c | 26 ++++++++++++-------------- 1 files changed, 12 insertions(+), 14 deletions(-) diff --git a/hw/stellaris.c b/hw/stellaris.c index 01050d1..a7b68f4 100644 --- a/hw/stellaris.c +++ b/hw/stellaris.c @@ -1244,7 +1244,6 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, qemu_irq *pic; DeviceState *gpio_dev[7]; qemu_irq gpio_in[7][8]; - qemu_irq gpio_out[7][8]; qemu_irq adc; int sram_size; int flash_size; @@ -1284,8 +1283,9 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, pic[gpio_irq[i]]); for (j = 0; j < 8; j++) { gpio_in[i][j] = qdev_get_gpio_in(gpio_dev[i], j); - gpio_out[i][j] = NULL; } + } else { + gpio_dev[i] = NULL; } } @@ -1308,20 +1308,27 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, if (board->peripherals & BP_OLED_SSI) { DeviceState *mux; void *bus; + qemu_irq select_pin; bus = qdev_get_child_bus(dev, "ssi"); mux = ssi_create_slave(bus, "evb6965-ssi"); - gpio_out[GPIO_D][0] = qdev_get_gpio_in(mux, 0); + select_pin = qdev_get_gpio_in(mux, 0); + if (gpio_dev[GPIO_D]) { + qdev_connect_gpio_out(gpio_dev[GPIO_D], 0, select_pin); + } bus = qdev_get_child_bus(mux, "ssi0"); ssi_create_slave(bus, "ssi-sd"); bus = qdev_get_child_bus(mux, "ssi1"); dev = ssi_create_slave(bus, "ssd0323"); - gpio_out[GPIO_C][7] = qdev_get_gpio_in(dev, 0); + if (gpio_dev[GPIO_C]) { + qdev_connect_gpio_out(gpio_dev[GPIO_C], 7, + qdev_get_gpio_in(dev, 0)); + } /* Make sure the select pin is high. */ - qemu_irq_raise(gpio_out[GPIO_D][0]); + qemu_irq_raise(select_pin); } } if (board->dc4 & (1 << 28)) { @@ -1347,15 +1354,6 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, stellaris_gamepad_init(5, gpad_irq, gpad_keycode); } - for (i = 0; i < 7; i++) { - if (board->dc4 & (1 << i)) { - for (j = 0; j < 8; j++) { - if (gpio_out[i][j]) { - qdev_connect_gpio_out(gpio_dev[i], j, gpio_out[i][j]); - } - } - } - } } /* FIXME: Figure out how to generate these from stellaris_boards. */