Patchwork [v5,05/17] target-i386: Add cpu object access routines for Hypervisor level.

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Submitter Don Slutz
Date Sept. 22, 2012, 12:13 a.m.
Message ID <1348272809-27742-6-git-send-email-Don@CloudSwitch.com>
Download mbox | patch
Permalink /patch/186007/
State New
Headers show

Comments

Don Slutz - Sept. 22, 2012, 12:13 a.m.
These are modeled after x86_cpuid_get_xlevel and x86_cpuid_set_xlevel.

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |    8 ++++++++
 target-i386/cpu.h |    2 ++
 2 files changed, 10 insertions(+), 0 deletions(-)

Patch

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 7b31de9..e5deca2 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1193,6 +1193,11 @@  static void x86_cpuid_set_hv_level(Object *obj, Visitor *v, void *opaque,
 }
 
 #if !defined(CONFIG_USER_ONLY)
+static void x86_set_hyperv(Object *obj, Error **errp)
+{
+    object_property_set_int(obj, CPUID_HV_LEVEL_HYPERV, "hypervisor-level", errp);
+}
+
 static void x86_get_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
                                  const char *name, Error **errp)
 {
@@ -1215,6 +1220,7 @@  static void x86_set_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
         return;
     }
     hyperv_set_spinlock_retries(value);
+    x86_set_hyperv(obj, errp);
 }
 
 static void x86_get_hv_relaxed(Object *obj, Visitor *v, void *opaque,
@@ -1235,6 +1241,7 @@  static void x86_set_hv_relaxed(Object *obj, Visitor *v, void *opaque,
         return;
     }
     hyperv_enable_relaxed_timing(value);
+    x86_set_hyperv(obj, errp);
 }
 
 static void x86_get_hv_vapic(Object *obj, Visitor *v, void *opaque,
@@ -1255,6 +1262,7 @@  static void x86_set_hv_vapic(Object *obj, Visitor *v, void *opaque,
         return;
     }
     hyperv_enable_vapic_recommended(value);
+    x86_set_hyperv(obj, errp);
 }
 #endif
 
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 1899f69..3152a4e 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -488,6 +488,8 @@ 
 
 #define CPUID_VENDOR_VIA   "CentaurHauls"
 
+#define CPUID_HV_LEVEL_HYPERV  0x40000005
+
 #define CPUID_MWAIT_IBE     (1 << 1) /* Interrupts can exit capability */
 #define CPUID_MWAIT_EMX     (1 << 0) /* enumeration supported */