From patchwork Fri Sep 21 18:47:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jos=C3=A9_Miguel_Gon=C3=A7alves?= X-Patchwork-Id: 185875 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 302852C0085 for ; Sat, 22 Sep 2012 04:48:57 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 79FFA28094; Fri, 21 Sep 2012 20:48:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xlRL-wwp7QbG; Fri, 21 Sep 2012 20:48:55 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AE4B028081; Fri, 21 Sep 2012 20:48:53 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5CBA328089 for ; Fri, 21 Sep 2012 20:48:51 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vMcrCNnWd32K for ; Fri, 21 Sep 2012 20:48:49 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from lmv.inov.pt (lmv.inov.pt [146.193.64.2]) by theia.denx.de (Postfix) with ESMTPS id 6FED52807E for ; Fri, 21 Sep 2012 20:48:47 +0200 (CEST) Received: from st-ze.inov.intranet (gtout.inov.pt [146.193.64.254]) by lmv.inov.pt (8.13.1/8.13.1) with ESMTP id q8LIlvl7011996 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 21 Sep 2012 19:47:59 +0100 From: =?UTF-8?q?Jos=C3=A9=20Miguel=20Gon=C3=A7alves?= To: u-boot@lists.denx.de Date: Fri, 21 Sep 2012 19:47:41 +0100 Message-Id: <1348253268-21812-5-git-send-email-jose.goncalves@inov.pt> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1348253268-21812-1-git-send-email-jose.goncalves@inov.pt> References: <1348253268-21812-1-git-send-email-jose.goncalves@inov.pt> MIME-Version: 1.0 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.0.1 (lmv.inov.pt [146.193.64.2]); Fri, 21 Sep 2012 19:47:59 +0100 (WEST) X-INOV-EmailServer-Information: Please contact the Email service provider for more information X-INOV-EmailServer: Found to be clean X-INOV-EmailServer-From: jose.goncalves@inov.pt Cc: marex@denx.de, trini@ti.com, =?UTF-8?q?Jos=C3=A9=20Miguel=20Gon=C3=A7alves?= , scottwood@freescale.com Subject: [U-Boot] [PATCH v5 04/11] serial: Use a more precise baud rate generation for serial_s3c24x0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The values stored in the baud rate divisor register (UBRDIVn) and dividing slot register (UDIVSLOTn), are used to determine the serial baudrate. Previously only UBRDIVn was set. This patch initializes also UDIVSLOTn which allows to obtain a more precise baudrate. Signed-off-by: José Miguel Gonçalves --- Changes for v2: - New patch Changes for v3: - Verbose patch description Changes for v4: - None Changes for v5: - None --- drivers/serial/serial_s3c24x0.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c index 280cd2d..c9bc121 100644 --- a/drivers/serial/serial_s3c24x0.c +++ b/drivers/serial/serial_s3c24x0.c @@ -92,16 +92,32 @@ DECLARE_GLOBAL_DATA_PTR; static int hwflow; #endif +/* + * The values stored in the baud rate divisor register (UBRDIVn) and dividing + * slot register (UDIVSLOTn), are used to determine the serial Tx/Rx clock rate + * (baud rate) as follows: + * DIV_VAL = UBRDIVn + (num of 1’s in UDIVSLOTn) / 16 + * Using UDIVSLOT, which is the factor of floating point divisor, you can make + * more accurate baud rate. Section 2.1.10 of the S3C2416 User's Manual suggests + * using the constants on the following table. + */ +static const int udivslot[] = { + 0x0000, 0x0080, 0x0808, 0x0888, 0x2222, 0x4924, 0x4A52, 0x54AA, + 0x5555, 0xD555, 0xD5D5, 0xDDD5, 0xDDDD, 0xDFDD, 0xDFDF, 0xFFDF, +}; + void _serial_setbrg(const int dev_index) { struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); - unsigned int reg = 0; + u32 pclk; + u32 baudrate; int i; - /* value is calculated so : (int)(PCLK/16./baudrate) -1 */ - reg = get_PCLK() / (16 * gd->baudrate) - 1; + pclk = get_PCLK(); + baudrate = gd->baudrate; - writel(reg, &uart->ubrdiv); + writel((pclk / baudrate / 16) - 1, &uart->ubrdiv); + writel(udivslot[(pclk / baudrate) % 16], &uart->udivslot); for (i = 0; i < 100; i++) /* Delay */ ; }