diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index f2bc15f..2f3795b 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1796,154 +1796,6 @@ (define_expand "sub<mode>3"
     }
 }")
 
-(define_expand "sminsi3"
-  [(set (match_dup 3)
-	(if_then_else:SI (gt:SI (match_operand:SI 1 "gpc_reg_operand" "")
-				(match_operand:SI 2 "reg_or_short_operand" ""))
-			 (const_int 0)
-			 (minus:SI (match_dup 2) (match_dup 1))))
-   (set (match_operand:SI 0 "gpc_reg_operand" "")
-	(minus:SI (match_dup 2) (match_dup 3)))]
-  "TARGET_ISEL"
-  "
-{
-  operands[2] = force_reg (SImode, operands[2]);
-  rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]);
-  DONE;
-}")
-
-(define_expand "smaxsi3"
-  [(set (match_dup 3)
-	(if_then_else:SI (gt:SI (match_operand:SI 1 "gpc_reg_operand" "")
-				(match_operand:SI 2 "reg_or_short_operand" ""))
-			 (const_int 0)
-			 (minus:SI (match_dup 2) (match_dup 1))))
-   (set (match_operand:SI 0 "gpc_reg_operand" "")
-	(plus:SI (match_dup 3) (match_dup 1)))]
-  "TARGET_ISEL"
-  "
-{
-  operands[2] = force_reg (SImode, operands[2]);
-  rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]);
-  DONE;
-}")
-
-(define_expand "uminsi3"
-  [(set (match_dup 3) (xor:SI (match_operand:SI 1 "gpc_reg_operand" "")
-			      (match_dup 5)))
-   (set (match_dup 4) (xor:SI (match_operand:SI 2 "gpc_reg_operand" "")
-			      (match_dup 5)))
-   (set (match_dup 3) (if_then_else:SI (gt (match_dup 3) (match_dup 4))
-				       (const_int 0)
-				       (minus:SI (match_dup 4) (match_dup 3))))
-   (set (match_operand:SI 0 "gpc_reg_operand" "")
-	(minus:SI (match_dup 2) (match_dup 3)))]
-  "TARGET_ISEL"
-  "
-{
-  rs6000_emit_minmax (operands[0], UMIN, operands[1], operands[2]);
-  DONE;
-}")
-
-(define_expand "umaxsi3"
-  [(set (match_dup 3) (xor:SI (match_operand:SI 1 "gpc_reg_operand" "")
-			      (match_dup 5)))
-   (set (match_dup 4) (xor:SI (match_operand:SI 2 "gpc_reg_operand" "")
-			      (match_dup 5)))
-   (set (match_dup 3) (if_then_else:SI (gt (match_dup 3) (match_dup 4))
-				       (const_int 0)
-				       (minus:SI (match_dup 4) (match_dup 3))))
-   (set (match_operand:SI 0 "gpc_reg_operand" "")
-	(plus:SI (match_dup 3) (match_dup 1)))]
-  "TARGET_ISEL"
-  "
-{
-  rs6000_emit_minmax (operands[0], UMAX, operands[1], operands[2]);
-  DONE;
-}")
-
-;; We don't need abs with condition code because such comparisons should
-;; never be done.
-(define_expand "abssi2"
-  [(set (match_operand:SI 0 "gpc_reg_operand" "")
-	(abs:SI (match_operand:SI 1 "gpc_reg_operand" "")))]
-  ""
-  "
-{
-  if (TARGET_ISEL)
-    {
-      emit_insn (gen_abssi2_isel (operands[0], operands[1]));
-      DONE;
-    }
-  else
-    {
-      emit_insn (gen_abssi2_nopower (operands[0], operands[1]));
-      DONE;
-    }
-}")
-
-(define_insn_and_split "abs<mode>2_isel"
-  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
-        (abs:GPR (match_operand:GPR 1 "gpc_reg_operand" "b")))
-   (clobber (match_scratch:GPR 2 "=&b"))
-   (clobber (match_scratch:CC 3 "=y"))]
-  "TARGET_ISEL"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2) (neg:GPR (match_dup 1)))
-   (set (match_dup 3)
-	(compare:CC (match_dup 1)
-		    (const_int 0)))
-   (set (match_dup 0)
-	(if_then_else:GPR (lt (match_dup 3)
-			      (const_int 0))
-			  (match_dup 2)
-			  (match_dup 1)))]
-  "")
-
-(define_insn_and_split "nabs<mode>2_isel"
-  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
-        (neg:GPR (abs:GPR (match_operand:GPR 1 "gpc_reg_operand" "b"))))
-   (clobber (match_scratch:GPR 2 "=&b"))
-   (clobber (match_scratch:CC 3 "=y"))]
-  "TARGET_ISEL"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2) (neg:GPR (match_dup 1)))
-   (set (match_dup 3)
-	(compare:CC (match_dup 1)
-		    (const_int 0)))
-   (set (match_dup 0)
-	(if_then_else:GPR (lt (match_dup 3)
-			      (const_int 0))
-			  (match_dup 1)
-			  (match_dup 2)))]
-  "")
-
-(define_insn_and_split "abssi2_nopower"
-  [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
-        (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0")))
-   (clobber (match_scratch:SI 2 "=&r,&r"))]
-  "! TARGET_ISEL"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
-   (set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
-   (set (match_dup 0) (minus:SI (match_dup 0) (match_dup 2)))]
-  "")
-
-(define_insn_and_split "*nabs_nopower"
-  [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
-        (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0"))))
-   (clobber (match_scratch:SI 2 "=&r,&r"))]
-  ""
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
-   (set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
-   (set (match_dup 0) (minus:SI (match_dup 2) (match_dup 0)))]
-  "")
-
 (define_expand "neg<mode>2"
   [(set (match_operand:SDI 0 "gpc_reg_operand" "")
 	(neg:SDI (match_operand:SDI 1 "gpc_reg_operand" "")))]
@@ -6374,43 +6226,6 @@ (define_insn "*ashrdisi3_noppc64"
 
 ;; PowerPC64 DImode operations.
 
-(define_expand "absdi2"
-  [(set (match_operand:DI 0 "gpc_reg_operand" "")
-	(abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))]
-  "TARGET_POWERPC64"
-  "
-{
-  if (TARGET_ISEL)
-    emit_insn (gen_absdi2_isel (operands[0], operands[1]));
-  else
-    emit_insn (gen_absdi2_internal (operands[0], operands[1]));
-  DONE;
-}")
-
-(define_insn_and_split "absdi2_internal"
-  [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
-        (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0")))
-   (clobber (match_scratch:DI 2 "=&r,&r"))]
-  "TARGET_POWERPC64 && !TARGET_ISEL"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
-   (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
-   (set (match_dup 0) (minus:DI (match_dup 0) (match_dup 2)))]
-  "")
-
-(define_insn_and_split "*nabsdi2"
-  [(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
-        (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
-   (clobber (match_scratch:DI 2 "=&r,&r"))]
-  "TARGET_POWERPC64 && !TARGET_ISEL"
-  "#"
-  "&& reload_completed"
-  [(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
-   (set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
-   (set (match_dup 0) (minus:DI (match_dup 2) (match_dup 0)))]
-  "")
-
 (define_insn "muldi3"
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
         (mult:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r")
@@ -7785,51 +7600,6 @@ (define_split
 	(compare:CC (match_dup 0)
 		    (const_int 0)))]
   "")
-
-(define_expand "smindi3"
-  [(match_operand:DI 0 "gpc_reg_operand" "")
-   (match_operand:DI 1 "gpc_reg_operand" "")
-   (match_operand:DI 2 "gpc_reg_operand" "")]
-  "TARGET_ISEL64"
-  "
-{
-  rs6000_emit_minmax (operands[0], SMIN, operands[1], operands[2]);
-  DONE;
-}")
-
-(define_expand "smaxdi3"
-  [(match_operand:DI 0 "gpc_reg_operand" "")
-   (match_operand:DI 1 "gpc_reg_operand" "")
-   (match_operand:DI 2 "gpc_reg_operand" "")]
-  "TARGET_ISEL64"
-  "
-{
-  rs6000_emit_minmax (operands[0], SMAX, operands[1], operands[2]);
-  DONE;
-}")
-
-(define_expand "umindi3"
-  [(match_operand:DI 0 "gpc_reg_operand" "")
-   (match_operand:DI 1 "gpc_reg_operand" "")
-   (match_operand:DI 2 "gpc_reg_operand" "")]
-  "TARGET_ISEL64"
-  "
-{
-  rs6000_emit_minmax (operands[0], UMIN, operands[1], operands[2]);
-  DONE;
-}")
-
-(define_expand "umaxdi3"
-  [(match_operand:DI 0 "gpc_reg_operand" "")
-   (match_operand:DI 1 "gpc_reg_operand" "")
-   (match_operand:DI 2 "gpc_reg_operand" "")]
-  "TARGET_ISEL64"
-  "
-{
-  rs6000_emit_minmax (operands[0], UMAX, operands[1], operands[2]);
-  DONE;
-}")
-
 
 ;; Now define ways of moving data around.
 
