From patchwork Tue Sep 18 13:53:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 184725 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 85AA62C0095 for ; Tue, 18 Sep 2012 23:54:14 +1000 (EST) Received: from localhost ([::1]:57844 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDyFg-0006OD-M5 for incoming@patchwork.ozlabs.org; Tue, 18 Sep 2012 09:54:12 -0400 Received: from eggs.gnu.org ([208.118.235.92]:45066) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDyFQ-0006If-LM for qemu-devel@nongnu.org; Tue, 18 Sep 2012 09:54:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TDyFL-0006qk-Np for qemu-devel@nongnu.org; Tue, 18 Sep 2012 09:53:56 -0400 Received: from 38.0.169.217.in-addr.arpa ([217.169.0.38]:55611 helo=mnementh.archaic.org.uk) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDyFL-0006o9-GT for qemu-devel@nongnu.org; Tue, 18 Sep 2012 09:53:51 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1TDyFC-0000kY-Aq; Tue, 18 Sep 2012 14:53:42 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 18 Sep 2012 14:53:42 +0100 Message-Id: <1347976422-2859-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 217.169.0.38 Cc: qemu-trivial@nongnu.org, patches@linaro.org Subject: [Qemu-devel] [PATCH] hw/pflash_cfi0[12]: Use host-utils.h ctz32() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Drop the private reimplementation of ctz32() from pflash_cfi0[12] in favour of using the standard version from host-utils.h. Signed-off-by: Peter Maydell Reviewed-by: Stefan Weil --- hw/pflash_cfi01.c | 37 +------------------------------------ hw/pflash_cfi02.c | 37 +------------------------------------ 2 files changed, 2 insertions(+), 72 deletions(-) diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c index d1c7423..00f1cdd 100644 --- a/hw/pflash_cfi01.c +++ b/hw/pflash_cfi01.c @@ -41,6 +41,7 @@ #include "block.h" #include "qemu-timer.h" #include "exec-memory.h" +#include "host-utils.h" #define PFLASH_BUG(fmt, ...) \ do { \ @@ -543,42 +544,6 @@ static const MemoryRegionOps pflash_cfi01_ops_le = { .endianness = DEVICE_NATIVE_ENDIAN, }; -/* Count trailing zeroes of a 32 bits quantity */ -static int ctz32 (uint32_t n) -{ - int ret; - - ret = 0; - if (!(n & 0xFFFF)) { - ret += 16; - n = n >> 16; - } - if (!(n & 0xFF)) { - ret += 8; - n = n >> 8; - } - if (!(n & 0xF)) { - ret += 4; - n = n >> 4; - } - if (!(n & 0x3)) { - ret += 2; - n = n >> 2; - } - if (!(n & 0x1)) { - ret++; -#if 0 /* This is not necessary as n is never 0 */ - n = n >> 1; -#endif - } -#if 0 /* This is not necessary as n is never 0 */ - if (!n) - ret++; -#endif - - return ret; -} - pflash_t *pflash_cfi01_register(target_phys_addr_t base, DeviceState *qdev, const char *name, target_phys_addr_t size, diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c index 3e2002e..8cb1549 100644 --- a/hw/pflash_cfi02.c +++ b/hw/pflash_cfi02.c @@ -40,6 +40,7 @@ #include "qemu-timer.h" #include "block.h" #include "exec-memory.h" +#include "host-utils.h" //#define PFLASH_DEBUG #ifdef PFLASH_DEBUG @@ -575,42 +576,6 @@ static const MemoryRegionOps pflash_cfi02_ops_le = { .endianness = DEVICE_NATIVE_ENDIAN, }; -/* Count trailing zeroes of a 32 bits quantity */ -static int ctz32 (uint32_t n) -{ - int ret; - - ret = 0; - if (!(n & 0xFFFF)) { - ret += 16; - n = n >> 16; - } - if (!(n & 0xFF)) { - ret += 8; - n = n >> 8; - } - if (!(n & 0xF)) { - ret += 4; - n = n >> 4; - } - if (!(n & 0x3)) { - ret += 2; - n = n >> 2; - } - if (!(n & 0x1)) { - ret++; -#if 0 /* This is not necessary as n is never 0 */ - n = n >> 1; -#endif - } -#if 0 /* This is not necessary as n is never 0 */ - if (!n) - ret++; -#endif - - return ret; -} - pflash_t *pflash_cfi02_register(target_phys_addr_t base, DeviceState *qdev, const char *name, target_phys_addr_t size,