Patchwork Added LEON MMU ASI mappings and corrected LEON3 MMU masks.

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Submitter Ronald Hecht
Date Sept. 18, 2012, 11:47 a.m.
Message ID <1347968876-6368-1-git-send-email-ronald.hecht@gmx.de>
Download mbox | patch
Permalink /patch/184693/
State New
Headers show

Comments

Ronald Hecht - Sept. 18, 2012, 11:47 a.m.
This patch adds SPARC ASI mappings that are used by the LEON processor.It also
corrects the MMU context register and context table pointer mask of the LEON3.

Signed-off-by: Ronald Hecht <ronald.hecht@gmx.de>
---
 target-sparc/cpu.c         |    4 ++--
 target-sparc/ldst_helper.c |    6 ++++++
 2 files changed, 8 insertions(+), 2 deletions(-)
Fabien Chouteau - Sept. 18, 2012, 12:53 p.m.
On 09/18/2012 01:47 PM, Ronald Hecht wrote:
> This patch adds SPARC ASI mappings that are used by the LEON processor.It also
> corrects the MMU context register and context table pointer mask of the LEON3.
> 

Reviewed-by: Fabien Chouteau <chouteau@adacore.com>

Patch

diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index f7c004c..0d5abb8 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -583,8 +583,8 @@  static const sparc_def_t sparc_defs[] = {
         .fpu_version = 4 << 17, /* FPU version 4 (Meiko) */
         .mmu_version = 0xf3000000,
         .mmu_bm = 0x00000000,
-        .mmu_ctpr_mask = 0x007ffff0,
-        .mmu_cxr_mask = 0x0000003f,
+        .mmu_ctpr_mask = 0xfffffffc,
+        .mmu_cxr_mask = 0x000000ff,
         .mmu_sfsr_mask = 0xffffffff,
         .mmu_trcr_mask = 0xffffffff,
         .nwindows = 8,
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 9bec7a9..684b73b 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -511,6 +511,7 @@  uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
 #endif
         break;
     case 3: /* MMU probe */
+    case 0x18: /* LEON3 MMU probe */
         {
             int mmulev;
 
@@ -525,6 +526,7 @@  uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
         }
         break;
     case 4: /* read MMU regs */
+    case 0x19: /* LEON3 read MMU regs */
         {
             int reg = (addr >> 8) & 0x1f;
 
@@ -600,6 +602,7 @@  uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
     case 0xf: /* D-cache data */
         break;
     case 0x20: /* MMU passthrough */
+    case 0x1c: /* LEON MMU passthrough */
         switch (size) {
         case 1:
             ret = ldub_phys(addr);
@@ -841,6 +844,7 @@  void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
 #endif
         break;
     case 3: /* MMU flush */
+    case 0x18: /* LEON3 MMU flush */
         {
             int mmulev;
 
@@ -865,6 +869,7 @@  void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
         }
         break;
     case 4: /* write MMU regs */
+    case 0x19: /* LEON3 write MMU regs */
         {
             int reg = (addr >> 8) & 0x1f;
             uint32_t oldreg;
@@ -993,6 +998,7 @@  void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
         }
         break;
     case 0x20: /* MMU passthrough */
+    case 0x1c: /* LEON MMU passthrough */
         {
             switch (size) {
             case 1: