Patchwork [4/7] target-mips: Pass DisasContext to fpr32 load/store routines

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Submitter Richard Henderson
Date Sept. 17, 2012, 9:35 p.m.
Message ID <1347917713-23343-5-git-send-email-rth@twiddle.net>
Download mbox | patch
Permalink /patch/184568/
State New
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Richard Henderson - Sept. 17, 2012, 9:35 p.m.
The large mechanical change in support of a follow-on patch
that changes the representation of the fp registers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-mips/translate.c | 312 ++++++++++++++++++++++++------------------------
 1 file changed, 153 insertions(+), 159 deletions(-)
Aurelien Jarno - Sept. 18, 2012, 4:39 p.m.
On Mon, Sep 17, 2012 at 02:35:10PM -0700, Richard Henderson wrote:
> The large mechanical change in support of a follow-on patch
> that changes the representation of the fp registers.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target-mips/translate.c | 312 ++++++++++++++++++++++++------------------------
>  1 file changed, 153 insertions(+), 159 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 775c3a1..b4301e9 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -662,42 +662,42 @@ static inline void gen_store_srsgpr (int from, int to)
>  }
>  
>  /* Floating point register moves. */
> -static inline void gen_load_fpr32 (TCGv_i32 t, int reg)
> +static inline void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
>  {
>      tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
>  }
>  
> -static inline void gen_store_fpr32 (TCGv_i32 t, int reg)
> +static inline void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
>  {
>      tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
>  }
>  
> -static inline void gen_load_fpr32h (TCGv_i32 t, int reg)
> +static inline void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
>  {
>      tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
>  }
>  
> -static inline void gen_store_fpr32h (TCGv_i32 t, int reg)
> +static inline void gen_store_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
>  {
>      tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
>  }
>  
> -static inline void gen_load_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
> +static inline void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
>  {
>      if (ctx->hflags & MIPS_HFLAG_F64) {
>          tcg_gen_ld_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
>      } else {
>          TCGv_i32 t0 = tcg_temp_new_i32();
>          TCGv_i32 t1 = tcg_temp_new_i32();
> -        gen_load_fpr32(t0, reg & ~1);
> -        gen_load_fpr32(t1, reg | 1);
> +        gen_load_fpr32(ctx, t0, reg & ~1);
> +        gen_load_fpr32(ctx, t1, reg | 1);
>          tcg_gen_concat_i32_i64(t, t0, t1);
>          tcg_temp_free_i32(t0);
>          tcg_temp_free_i32(t1);
>      }
>  }
>  
> -static inline void gen_store_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
> +static inline void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
>  {
>      if (ctx->hflags & MIPS_HFLAG_F64) {
>          tcg_gen_st_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
> @@ -705,10 +705,10 @@ static inline void gen_store_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
>          TCGv_i64 t0 = tcg_temp_new_i64();
>          TCGv_i32 t1 = tcg_temp_new_i32();
>          tcg_gen_trunc_i64_i32(t1, t);
> -        gen_store_fpr32(t1, reg & ~1);
> +        gen_store_fpr32(ctx, t1, reg & ~1);
>          tcg_gen_shri_i64(t0, t, 32);
>          tcg_gen_trunc_i64_i32(t1, t0);
> -        gen_store_fpr32(t1, reg | 1);
> +        gen_store_fpr32(ctx, t1, reg | 1);
>          tcg_temp_free_i32(t1);
>          tcg_temp_free_i64(t0);
>      }
> @@ -862,12 +862,6 @@ static inline void check_mips_64(DisasContext *ctx)
>          generate_exception(ctx, EXCP_RI);
>  }
>  
> -/* Define small wrappers for gen_load_fpr* so that we have a uniform
> -   calling interface for 32 and 64-bit FPRs.  No sense in changing
> -   all callers for gen_load_fpr32 when we need the CTX parameter for
> -   this one use.  */
> -#define gen_ldcmp_fpr32(ctx, x, y) gen_load_fpr32(x, y)
> -#define gen_ldcmp_fpr64(ctx, x, y) gen_load_fpr64(ctx, x, y)
>  #define FOP_CONDS(type, abs, fmt, ifmt, bits)                                 \
>  static inline void gen_cmp ## type ## _ ## fmt(DisasContext *ctx, int n,      \
>                                                 int ft, int fs, int cc)        \
> @@ -890,8 +884,8 @@ static inline void gen_cmp ## type ## _ ## fmt(DisasContext *ctx, int n,      \
>          }                                                                     \
>          break;                                                                \
>      }                                                                         \
> -    gen_ldcmp_fpr##bits (ctx, fp0, fs);                                       \
> -    gen_ldcmp_fpr##bits (ctx, fp1, ft);                                       \
> +    gen_load_fpr##bits(ctx, fp0, fs);                                         \
> +    gen_load_fpr##bits(ctx, fp1, ft);                                         \
>      switch (n) {                                                              \
>      case  0: gen_helper_0e2i(cmp ## type ## _ ## fmt ## _f, fp0, fp1, cc);    break;\
>      case  1: gen_helper_0e2i(cmp ## type ## _ ## fmt ## _un, fp0, fp1, cc);   break;\
> @@ -1283,7 +1277,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
>  
>              tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
>              tcg_gen_trunc_tl_i32(fp0, t0);
> -            gen_store_fpr32(fp0, ft);
> +            gen_store_fpr32(ctx, fp0, ft);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "lwc1";
> @@ -1293,7 +1287,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv t1 = tcg_temp_new();
>  
> -            gen_load_fpr32(fp0, ft);
> +            gen_load_fpr32(ctx, fp0, ft);
>              tcg_gen_extu_i32_tl(t1, fp0);
>              tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
>              tcg_temp_free(t1);
> @@ -5704,13 +5698,13 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
>          if (h == 0) {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, rt);
> +            gen_load_fpr32(ctx, fp0, rt);
>              tcg_gen_ext_i32_tl(t0, fp0);
>              tcg_temp_free_i32(fp0);
>          } else {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32h(fp0, rt);
> +            gen_load_fpr32h(ctx, fp0, rt);
>              tcg_gen_ext_i32_tl(t0, fp0);
>              tcg_temp_free_i32(fp0);
>          }
> @@ -5903,13 +5897,13 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
>              tcg_gen_trunc_tl_i32(fp0, t0);
> -            gen_store_fpr32(fp0, rd);
> +            gen_store_fpr32(ctx, fp0, rd);
>              tcg_temp_free_i32(fp0);
>          } else {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
>              tcg_gen_trunc_tl_i32(fp0, t0);
> -            gen_store_fpr32h(fp0, rd);
> +            gen_store_fpr32h(ctx, fp0, rd);
>              tcg_temp_free_i32(fp0);
>          }
>          break;
> @@ -6324,7 +6318,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              tcg_gen_ext_i32_tl(t0, fp0);
>              tcg_temp_free_i32(fp0);
>          }
> @@ -6337,7 +6331,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
>              tcg_gen_trunc_tl_i32(fp0, t0);
> -            gen_store_fpr32(fp0, fs);
> +            gen_store_fpr32(ctx, fp0, fs);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "mtc1";
> @@ -6368,7 +6362,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32h(fp0, fs);
> +            gen_load_fpr32h(ctx, fp0, fs);
>              tcg_gen_ext_i32_tl(t0, fp0);
>              tcg_temp_free_i32(fp0);
>          }
> @@ -6381,7 +6375,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
>              tcg_gen_trunc_tl_i32(fp0, t0);
> -            gen_store_fpr32h(fp0, fs);
> +            gen_store_fpr32h(ctx, fp0, fs);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "mthc1";
> @@ -6426,7 +6420,7 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
>      gen_set_label(l1);
>  }
>  
> -static inline void gen_movcf_s (int fs, int fd, int cc, int tf)
> +static void gen_movcf_s(DisasContext *ctx, int fs, int fd, int cc, int tf)
>  {
>      int cond;
>      TCGv_i32 t0 = tcg_temp_new_i32();
> @@ -6439,13 +6433,13 @@ static inline void gen_movcf_s (int fs, int fd, int cc, int tf)
>  
>      tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc));
>      tcg_gen_brcondi_i32(cond, t0, 0, l1);
> -    gen_load_fpr32(t0, fs);
> -    gen_store_fpr32(t0, fd);
> +    gen_load_fpr32(ctx, t0, fs);
> +    gen_store_fpr32(ctx, t0, fd);
>      gen_set_label(l1);
>      tcg_temp_free_i32(t0);
>  }
>  
> -static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int tf)
> +static void gen_movcf_d(DisasContext *ctx, int fs, int fd, int cc, int tf)
>  {
>      int cond;
>      TCGv_i32 t0 = tcg_temp_new_i32();
> @@ -6467,7 +6461,7 @@ static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int t
>      gen_set_label(l1);
>  }
>  
> -static inline void gen_movcf_ps (int fs, int fd, int cc, int tf)
> +static void gen_movcf_ps(DisasContext *ctx, int fs, int fd, int cc, int tf)
>  {
>      int cond;
>      TCGv_i32 t0 = tcg_temp_new_i32();
> @@ -6481,14 +6475,14 @@ static inline void gen_movcf_ps (int fs, int fd, int cc, int tf)
>  
>      tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc));
>      tcg_gen_brcondi_i32(cond, t0, 0, l1);
> -    gen_load_fpr32(t0, fs);
> -    gen_store_fpr32(t0, fd);
> +    gen_load_fpr32(ctx, t0, fs);
> +    gen_store_fpr32(ctx, t0, fd);
>      gen_set_label(l1);
>  
>      tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc+1));
>      tcg_gen_brcondi_i32(cond, t0, 0, l2);
> -    gen_load_fpr32h(t0, fs);
> -    gen_store_fpr32h(t0, fd);
> +    gen_load_fpr32h(ctx, t0, fs);
> +    gen_store_fpr32h(ctx, t0, fd);
>      tcg_temp_free_i32(t0);
>      gen_set_label(l2);
>  }
> @@ -6543,11 +6537,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
>              gen_helper_float_add_s(fp0, cpu_env, fp0, fp1);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "add.s";
> @@ -6558,11 +6552,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
>              gen_helper_float_sub_s(fp0, cpu_env, fp0, fp1);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "sub.s";
> @@ -6573,11 +6567,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
>              gen_helper_float_mul_s(fp0, cpu_env, fp0, fp1);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "mul.s";
> @@ -6588,11 +6582,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
>              gen_helper_float_div_s(fp0, cpu_env, fp0, fp1);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "div.s";
> @@ -6602,9 +6596,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_sqrt_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "sqrt.s";
> @@ -6613,9 +6607,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_abs_s(fp0, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "abs.s";
> @@ -6624,8 +6618,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_store_fpr32(fp0, fd);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "mov.s";
> @@ -6634,9 +6628,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_chs_s(fp0, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "neg.s";
> @@ -6647,7 +6641,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32 = tcg_temp_new_i32();
>              TCGv_i64 fp64 = tcg_temp_new_i64();
>  
> -            gen_load_fpr32(fp32, fs);
> +            gen_load_fpr32(ctx, fp32, fs);
>              gen_helper_float_roundl_s(fp64, cpu_env, fp32);
>              tcg_temp_free_i32(fp32);
>              gen_store_fpr64(ctx, fp64, fd);
> @@ -6661,7 +6655,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32 = tcg_temp_new_i32();
>              TCGv_i64 fp64 = tcg_temp_new_i64();
>  
> -            gen_load_fpr32(fp32, fs);
> +            gen_load_fpr32(ctx, fp32, fs);
>              gen_helper_float_truncl_s(fp64, cpu_env, fp32);
>              tcg_temp_free_i32(fp32);
>              gen_store_fpr64(ctx, fp64, fd);
> @@ -6675,7 +6669,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32 = tcg_temp_new_i32();
>              TCGv_i64 fp64 = tcg_temp_new_i64();
>  
> -            gen_load_fpr32(fp32, fs);
> +            gen_load_fpr32(ctx, fp32, fs);
>              gen_helper_float_ceill_s(fp64, cpu_env, fp32);
>              tcg_temp_free_i32(fp32);
>              gen_store_fpr64(ctx, fp64, fd);
> @@ -6689,7 +6683,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32 = tcg_temp_new_i32();
>              TCGv_i64 fp64 = tcg_temp_new_i64();
>  
> -            gen_load_fpr32(fp32, fs);
> +            gen_load_fpr32(ctx, fp32, fs);
>              gen_helper_float_floorl_s(fp64, cpu_env, fp32);
>              tcg_temp_free_i32(fp32);
>              gen_store_fpr64(ctx, fp64, fd);
> @@ -6701,9 +6695,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_roundw_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "round.w.s";
> @@ -6712,9 +6706,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_truncw_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "trunc.w.s";
> @@ -6723,9 +6717,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_ceilw_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "ceil.w.s";
> @@ -6734,15 +6728,15 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_floorw_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "floor.w.s";
>          break;
>      case OPC_MOVCF_S:
> -        gen_movcf_s(fs, fd, (ft >> 2) & 0x7, ft & 0x1);
> +        gen_movcf_s(ctx, fs, fd, (ft >> 2) & 0x7, ft & 0x1);
>          opn = "movcf.s";
>          break;
>      case OPC_MOVZ_S:
> @@ -6754,8 +6748,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>                  tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[ft], 0, l1);
>              }
>              fp0 = tcg_temp_new_i32();
> -            gen_load_fpr32(fp0, fs);
> -            gen_store_fpr32(fp0, fd);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>              gen_set_label(l1);
>          }
> @@ -6769,8 +6763,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              if (ft != 0) {
>                  tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[ft], 0, l1);
>                  fp0 = tcg_temp_new_i32();
> -                gen_load_fpr32(fp0, fs);
> -                gen_store_fpr32(fp0, fd);
> +                gen_load_fpr32(ctx, fp0, fs);
> +                gen_store_fpr32(ctx, fp0, fd);
>                  tcg_temp_free_i32(fp0);
>                  gen_set_label(l1);
>              }
> @@ -6782,9 +6776,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_recip_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "recip.s";
> @@ -6794,9 +6788,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_rsqrt_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "rsqrt.s";
> @@ -6807,11 +6801,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, fd);
>              gen_helper_float_recip2_s(fp0, cpu_env, fp0, fp1);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "recip2.s";
> @@ -6821,9 +6815,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_recip1_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "recip1.s";
> @@ -6833,9 +6827,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_rsqrt1_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "rsqrt1.s";
> @@ -6846,11 +6840,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
>              gen_helper_float_rsqrt2_s(fp0, cpu_env, fp0, fp1);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "rsqrt2.s";
> @@ -6861,7 +6855,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32 = tcg_temp_new_i32();
>              TCGv_i64 fp64 = tcg_temp_new_i64();
>  
> -            gen_load_fpr32(fp32, fs);
> +            gen_load_fpr32(ctx, fp32, fs);
>              gen_helper_float_cvtd_s(fp64, cpu_env, fp32);
>              tcg_temp_free_i32(fp32);
>              gen_store_fpr64(ctx, fp64, fd);
> @@ -6873,9 +6867,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_cvtw_s(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "cvt.w.s";
> @@ -6886,7 +6880,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32 = tcg_temp_new_i32();
>              TCGv_i64 fp64 = tcg_temp_new_i64();
>  
> -            gen_load_fpr32(fp32, fs);
> +            gen_load_fpr32(ctx, fp32, fs);
>              gen_helper_float_cvtl_s(fp64, cpu_env, fp32);
>              tcg_temp_free_i32(fp32);
>              gen_store_fpr64(ctx, fp64, fd);
> @@ -6901,8 +6895,8 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32_0 = tcg_temp_new_i32();
>              TCGv_i32 fp32_1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp32_0, fs);
> -            gen_load_fpr32(fp32_1, ft);
> +            gen_load_fpr32(ctx, fp32_0, fs);
> +            gen_load_fpr32(ctx, fp32_1, ft);
>              tcg_gen_concat_i32_i64(fp64, fp32_1, fp32_0);
>              tcg_temp_free_i32(fp32_1);
>              tcg_temp_free_i32(fp32_0);
> @@ -7103,7 +7097,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              gen_load_fpr64(ctx, fp64, fs);
>              gen_helper_float_roundw_d(fp32, cpu_env, fp64);
>              tcg_temp_free_i64(fp64);
> -            gen_store_fpr32(fp32, fd);
> +            gen_store_fpr32(ctx, fp32, fd);
>              tcg_temp_free_i32(fp32);
>          }
>          opn = "round.w.d";
> @@ -7117,7 +7111,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              gen_load_fpr64(ctx, fp64, fs);
>              gen_helper_float_truncw_d(fp32, cpu_env, fp64);
>              tcg_temp_free_i64(fp64);
> -            gen_store_fpr32(fp32, fd);
> +            gen_store_fpr32(ctx, fp32, fd);
>              tcg_temp_free_i32(fp32);
>          }
>          opn = "trunc.w.d";
> @@ -7131,7 +7125,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              gen_load_fpr64(ctx, fp64, fs);
>              gen_helper_float_ceilw_d(fp32, cpu_env, fp64);
>              tcg_temp_free_i64(fp64);
> -            gen_store_fpr32(fp32, fd);
> +            gen_store_fpr32(ctx, fp32, fd);
>              tcg_temp_free_i32(fp32);
>          }
>          opn = "ceil.w.d";
> @@ -7145,7 +7139,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              gen_load_fpr64(ctx, fp64, fs);
>              gen_helper_float_floorw_d(fp32, cpu_env, fp64);
>              tcg_temp_free_i64(fp64);
> -            gen_store_fpr32(fp32, fd);
> +            gen_store_fpr32(ctx, fp32, fd);
>              tcg_temp_free_i32(fp32);
>          }
>          opn = "floor.w.d";
> @@ -7297,7 +7291,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              gen_load_fpr64(ctx, fp64, fs);
>              gen_helper_float_cvts_d(fp32, cpu_env, fp64);
>              tcg_temp_free_i64(fp64);
> -            gen_store_fpr32(fp32, fd);
> +            gen_store_fpr32(ctx, fp32, fd);
>              tcg_temp_free_i32(fp32);
>          }
>          opn = "cvt.s.d";
> @@ -7311,7 +7305,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              gen_load_fpr64(ctx, fp64, fs);
>              gen_helper_float_cvtw_d(fp32, cpu_env, fp64);
>              tcg_temp_free_i64(fp64);
> -            gen_store_fpr32(fp32, fd);
> +            gen_store_fpr32(ctx, fp32, fd);
>              tcg_temp_free_i32(fp32);
>          }
>          opn = "cvt.w.d";
> @@ -7332,9 +7326,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_cvts_w(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "cvt.s.w";
> @@ -7345,7 +7339,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp32 = tcg_temp_new_i32();
>              TCGv_i64 fp64 = tcg_temp_new_i64();
>  
> -            gen_load_fpr32(fp32, fs);
> +            gen_load_fpr32(ctx, fp32, fs);
>              gen_helper_float_cvtd_w(fp64, cpu_env, fp32);
>              tcg_temp_free_i32(fp32);
>              gen_store_fpr64(ctx, fp64, fd);
> @@ -7362,7 +7356,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              gen_load_fpr64(ctx, fp64, fs);
>              gen_helper_float_cvts_l(fp32, cpu_env, fp64);
>              tcg_temp_free_i64(fp64);
> -            gen_store_fpr32(fp32, fd);
> +            gen_store_fpr32(ctx, fp32, fd);
>              tcg_temp_free_i32(fp32);
>          }
>          opn = "cvt.s.l";
> @@ -7473,7 +7467,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          break;
>      case OPC_MOVCF_PS:
>          check_cp1_64bitmode(ctx);
> -        gen_movcf_ps(fs, fd, (ft >> 2) & 0x7, ft & 0x1);
> +        gen_movcf_ps(ctx, fs, fd, (ft >> 2) & 0x7, ft & 0x1);
>          opn = "movcf.ps";
>          break;
>      case OPC_MOVZ_PS:
> @@ -7598,9 +7592,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32h(fp0, fs);
> +            gen_load_fpr32h(ctx, fp0, fs);
>              gen_helper_float_cvts_pu(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "cvt.s.pu";
> @@ -7622,9 +7616,9 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>          {
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              gen_helper_float_cvts_pl(fp0, cpu_env, fp0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "cvt.s.pl";
> @@ -7635,10 +7629,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> -            gen_store_fpr32h(fp0, fd);
> -            gen_store_fpr32(fp1, fd);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
> +            gen_store_fpr32h(ctx, fp0, fd);
> +            gen_store_fpr32(ctx, fp1, fd);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
>          }
> @@ -7650,10 +7644,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32h(fp1, ft);
> -            gen_store_fpr32(fp1, fd);
> -            gen_store_fpr32h(fp0, fd);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32h(ctx, fp1, ft);
> +            gen_store_fpr32(ctx, fp1, fd);
> +            gen_store_fpr32h(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
>          }
> @@ -7665,10 +7659,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32h(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> -            gen_store_fpr32(fp1, fd);
> -            gen_store_fpr32h(fp0, fd);
> +            gen_load_fpr32h(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
> +            gen_store_fpr32(ctx, fp1, fd);
> +            gen_store_fpr32h(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
>          }
> @@ -7680,10 +7674,10 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32h(fp0, fs);
> -            gen_load_fpr32h(fp1, ft);
> -            gen_store_fpr32(fp1, fd);
> -            gen_store_fpr32h(fp0, fd);
> +            gen_load_fpr32h(ctx, fp0, fs);
> +            gen_load_fpr32h(ctx, fp1, ft);
> +            gen_store_fpr32(ctx, fp1, fd);
> +            gen_store_fpr32h(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
>          }
> @@ -7757,7 +7751,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
>  
>              tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
>              tcg_gen_trunc_tl_i32(fp0, t0);
> -            gen_store_fpr32(fp0, fd);
> +            gen_store_fpr32(ctx, fp0, fd);
>              tcg_temp_free_i32(fp0);
>          }
>          opn = "lwxc1";
> @@ -7792,7 +7786,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
>              TCGv_i32 fp0 = tcg_temp_new_i32();
>              TCGv t1 = tcg_temp_new();
>  
> -            gen_load_fpr32(fp0, fs);
> +            gen_load_fpr32(ctx, fp0, fs);
>              tcg_gen_extu_i32_tl(t1, fp0);
>              tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
>              tcg_temp_free_i32(fp0);
> @@ -7852,24 +7846,24 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
>              tcg_gen_andi_tl(t0, t0, 0x7);
>  
>              tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
> -            gen_load_fpr32(fp, fs);
> -            gen_load_fpr32h(fph, fs);
> -            gen_store_fpr32(fp, fd);
> -            gen_store_fpr32h(fph, fd);
> +            gen_load_fpr32(ctx, fp, fs);
> +            gen_load_fpr32h(ctx, fph, fs);
> +            gen_store_fpr32(ctx, fp, fd);
> +            gen_store_fpr32h(ctx, fph, fd);
>              tcg_gen_br(l2);
>              gen_set_label(l1);
>              tcg_gen_brcondi_tl(TCG_COND_NE, t0, 4, l2);
>              tcg_temp_free(t0);
>  #ifdef TARGET_WORDS_BIGENDIAN
> -            gen_load_fpr32(fp, fs);
> -            gen_load_fpr32h(fph, ft);
> -            gen_store_fpr32h(fp, fd);
> -            gen_store_fpr32(fph, fd);
> +            gen_load_fpr32(ctx, fp, fs);
> +            gen_load_fpr32h(ctx, fph, ft);
> +            gen_store_fpr32h(ctx, fp, fd);
> +            gen_store_fpr32(ctx, fph, fd);
>  #else
> -            gen_load_fpr32h(fph, fs);
> -            gen_load_fpr32(fp, ft);
> -            gen_store_fpr32(fph, fd);
> -            gen_store_fpr32h(fp, fd);
> +            gen_load_fpr32h(ctx, fph, fs);
> +            gen_load_fpr32(ctx, fp, ft);
> +            gen_store_fpr32(ctx, fph, fd);
> +            gen_store_fpr32h(ctx, fp, fd);
>  #endif
>              gen_set_label(l2);
>              tcg_temp_free_i32(fp);
> @@ -7884,13 +7878,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>              TCGv_i32 fp2 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> -            gen_load_fpr32(fp2, fr);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
> +            gen_load_fpr32(ctx, fp2, fr);
>              gen_helper_float_muladd_s(fp2, cpu_env, fp0, fp1, fp2);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp2, fd);
> +            gen_store_fpr32(ctx, fp2, fd);
>              tcg_temp_free_i32(fp2);
>          }
>          opn = "madd.s";
> @@ -7939,13 +7933,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>              TCGv_i32 fp2 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> -            gen_load_fpr32(fp2, fr);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
> +            gen_load_fpr32(ctx, fp2, fr);
>              gen_helper_float_mulsub_s(fp2, cpu_env, fp0, fp1, fp2);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp2, fd);
> +            gen_store_fpr32(ctx, fp2, fd);
>              tcg_temp_free_i32(fp2);
>          }
>          opn = "msub.s";
> @@ -7994,13 +7988,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>              TCGv_i32 fp2 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> -            gen_load_fpr32(fp2, fr);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
> +            gen_load_fpr32(ctx, fp2, fr);
>              gen_helper_float_nmuladd_s(fp2, cpu_env, fp0, fp1, fp2);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp2, fd);
> +            gen_store_fpr32(ctx, fp2, fd);
>              tcg_temp_free_i32(fp2);
>          }
>          opn = "nmadd.s";
> @@ -8049,13 +8043,13 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
>              TCGv_i32 fp1 = tcg_temp_new_i32();
>              TCGv_i32 fp2 = tcg_temp_new_i32();
>  
> -            gen_load_fpr32(fp0, fs);
> -            gen_load_fpr32(fp1, ft);
> -            gen_load_fpr32(fp2, fr);
> +            gen_load_fpr32(ctx, fp0, fs);
> +            gen_load_fpr32(ctx, fp1, ft);
> +            gen_load_fpr32(ctx, fp2, fr);
>              gen_helper_float_nmulsub_s(fp2, cpu_env, fp0, fp1, fp2);
>              tcg_temp_free_i32(fp0);
>              tcg_temp_free_i32(fp1);
> -            gen_store_fpr32(fp2, fd);
> +            gen_store_fpr32(ctx, fp2, fd);
>              tcg_temp_free_i32(fp2);
>          }
>          opn = "nmsub.s";
> @@ -10996,13 +10990,13 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
>                  case MOVF_FMT:
>                      switch (fmt) {
>                      case FMT_SDPS_S:
> -                        gen_movcf_s(rs, rt, cc, 0);
> +                        gen_movcf_s(ctx, rs, rt, cc, 0);
>                          break;
>                      case FMT_SDPS_D:
>                          gen_movcf_d(ctx, rs, rt, cc, 0);
>                          break;
>                      case FMT_SDPS_PS:
> -                        gen_movcf_ps(rs, rt, cc, 0);
> +                        gen_movcf_ps(ctx, rs, rt, cc, 0);
>                          break;
>                      default:
>                          goto pool32f_invalid;
> @@ -11011,13 +11005,13 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
>                  case MOVT_FMT:
>                      switch (fmt) {
>                      case FMT_SDPS_S:
> -                        gen_movcf_s(rs, rt, cc, 1);
> +                        gen_movcf_s(ctx, rs, rt, cc, 1);
>                          break;
>                      case FMT_SDPS_D:
>                          gen_movcf_d(ctx, rs, rt, cc, 1);
>                          break;
>                      case FMT_SDPS_PS:
> -                        gen_movcf_ps(rs, rt, cc, 1);
> +                        gen_movcf_ps(ctx, rs, rt, cc, 1);
>                          break;
>                      default:
>                          goto pool32f_invalid;

This patch looks fine. That said it is pointless without the next one...

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 775c3a1..b4301e9 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -662,42 +662,42 @@  static inline void gen_store_srsgpr (int from, int to)
 }
 
 /* Floating point register moves. */
-static inline void gen_load_fpr32 (TCGv_i32 t, int reg)
+static inline void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
 {
     tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
 }
 
-static inline void gen_store_fpr32 (TCGv_i32 t, int reg)
+static inline void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg)
 {
     tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
 }
 
-static inline void gen_load_fpr32h (TCGv_i32 t, int reg)
+static inline void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
 {
     tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
 }
 
-static inline void gen_store_fpr32h (TCGv_i32 t, int reg)
+static inline void gen_store_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
 {
     tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
 }
 
-static inline void gen_load_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
+static inline void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
 {
     if (ctx->hflags & MIPS_HFLAG_F64) {
         tcg_gen_ld_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
     } else {
         TCGv_i32 t0 = tcg_temp_new_i32();
         TCGv_i32 t1 = tcg_temp_new_i32();
-        gen_load_fpr32(t0, reg & ~1);
-        gen_load_fpr32(t1, reg | 1);
+        gen_load_fpr32(ctx, t0, reg & ~1);
+        gen_load_fpr32(ctx, t1, reg | 1);
         tcg_gen_concat_i32_i64(t, t0, t1);
         tcg_temp_free_i32(t0);
         tcg_temp_free_i32(t1);
     }
 }
 
-static inline void gen_store_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
+static inline void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
 {
     if (ctx->hflags & MIPS_HFLAG_F64) {
         tcg_gen_st_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
@@ -705,10 +705,10 @@  static inline void gen_store_fpr64 (DisasContext *ctx, TCGv_i64 t, int reg)
         TCGv_i64 t0 = tcg_temp_new_i64();
         TCGv_i32 t1 = tcg_temp_new_i32();
         tcg_gen_trunc_i64_i32(t1, t);
-        gen_store_fpr32(t1, reg & ~1);
+        gen_store_fpr32(ctx, t1, reg & ~1);
         tcg_gen_shri_i64(t0, t, 32);
         tcg_gen_trunc_i64_i32(t1, t0);
-        gen_store_fpr32(t1, reg | 1);
+        gen_store_fpr32(ctx, t1, reg | 1);
         tcg_temp_free_i32(t1);
         tcg_temp_free_i64(t0);
     }
@@ -862,12 +862,6 @@  static inline void check_mips_64(DisasContext *ctx)
         generate_exception(ctx, EXCP_RI);
 }
 
-/* Define small wrappers for gen_load_fpr* so that we have a uniform
-   calling interface for 32 and 64-bit FPRs.  No sense in changing
-   all callers for gen_load_fpr32 when we need the CTX parameter for
-   this one use.  */
-#define gen_ldcmp_fpr32(ctx, x, y) gen_load_fpr32(x, y)
-#define gen_ldcmp_fpr64(ctx, x, y) gen_load_fpr64(ctx, x, y)
 #define FOP_CONDS(type, abs, fmt, ifmt, bits)                                 \
 static inline void gen_cmp ## type ## _ ## fmt(DisasContext *ctx, int n,      \
                                                int ft, int fs, int cc)        \
@@ -890,8 +884,8 @@  static inline void gen_cmp ## type ## _ ## fmt(DisasContext *ctx, int n,      \
         }                                                                     \
         break;                                                                \
     }                                                                         \
-    gen_ldcmp_fpr##bits (ctx, fp0, fs);                                       \
-    gen_ldcmp_fpr##bits (ctx, fp1, ft);                                       \
+    gen_load_fpr##bits(ctx, fp0, fs);                                         \
+    gen_load_fpr##bits(ctx, fp1, ft);                                         \
     switch (n) {                                                              \
     case  0: gen_helper_0e2i(cmp ## type ## _ ## fmt ## _f, fp0, fp1, cc);    break;\
     case  1: gen_helper_0e2i(cmp ## type ## _ ## fmt ## _un, fp0, fp1, cc);   break;\
@@ -1283,7 +1277,7 @@  static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
 
             tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
             tcg_gen_trunc_tl_i32(fp0, t0);
-            gen_store_fpr32(fp0, ft);
+            gen_store_fpr32(ctx, fp0, ft);
             tcg_temp_free_i32(fp0);
         }
         opn = "lwc1";
@@ -1293,7 +1287,7 @@  static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv t1 = tcg_temp_new();
 
-            gen_load_fpr32(fp0, ft);
+            gen_load_fpr32(ctx, fp0, ft);
             tcg_gen_extu_i32_tl(t1, fp0);
             tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
             tcg_temp_free(t1);
@@ -5704,13 +5698,13 @@  static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
         if (h == 0) {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, rt);
+            gen_load_fpr32(ctx, fp0, rt);
             tcg_gen_ext_i32_tl(t0, fp0);
             tcg_temp_free_i32(fp0);
         } else {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32h(fp0, rt);
+            gen_load_fpr32h(ctx, fp0, rt);
             tcg_gen_ext_i32_tl(t0, fp0);
             tcg_temp_free_i32(fp0);
         }
@@ -5903,13 +5897,13 @@  static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
             tcg_gen_trunc_tl_i32(fp0, t0);
-            gen_store_fpr32(fp0, rd);
+            gen_store_fpr32(ctx, fp0, rd);
             tcg_temp_free_i32(fp0);
         } else {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
             tcg_gen_trunc_tl_i32(fp0, t0);
-            gen_store_fpr32h(fp0, rd);
+            gen_store_fpr32h(ctx, fp0, rd);
             tcg_temp_free_i32(fp0);
         }
         break;
@@ -6324,7 +6318,7 @@  static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             tcg_gen_ext_i32_tl(t0, fp0);
             tcg_temp_free_i32(fp0);
         }
@@ -6337,7 +6331,7 @@  static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
             tcg_gen_trunc_tl_i32(fp0, t0);
-            gen_store_fpr32(fp0, fs);
+            gen_store_fpr32(ctx, fp0, fs);
             tcg_temp_free_i32(fp0);
         }
         opn = "mtc1";
@@ -6368,7 +6362,7 @@  static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32h(fp0, fs);
+            gen_load_fpr32h(ctx, fp0, fs);
             tcg_gen_ext_i32_tl(t0, fp0);
             tcg_temp_free_i32(fp0);
         }
@@ -6381,7 +6375,7 @@  static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
             tcg_gen_trunc_tl_i32(fp0, t0);
-            gen_store_fpr32h(fp0, fs);
+            gen_store_fpr32h(ctx, fp0, fs);
             tcg_temp_free_i32(fp0);
         }
         opn = "mthc1";
@@ -6426,7 +6420,7 @@  static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
     gen_set_label(l1);
 }
 
-static inline void gen_movcf_s (int fs, int fd, int cc, int tf)
+static void gen_movcf_s(DisasContext *ctx, int fs, int fd, int cc, int tf)
 {
     int cond;
     TCGv_i32 t0 = tcg_temp_new_i32();
@@ -6439,13 +6433,13 @@  static inline void gen_movcf_s (int fs, int fd, int cc, int tf)
 
     tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc));
     tcg_gen_brcondi_i32(cond, t0, 0, l1);
-    gen_load_fpr32(t0, fs);
-    gen_store_fpr32(t0, fd);
+    gen_load_fpr32(ctx, t0, fs);
+    gen_store_fpr32(ctx, t0, fd);
     gen_set_label(l1);
     tcg_temp_free_i32(t0);
 }
 
-static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int tf)
+static void gen_movcf_d(DisasContext *ctx, int fs, int fd, int cc, int tf)
 {
     int cond;
     TCGv_i32 t0 = tcg_temp_new_i32();
@@ -6467,7 +6461,7 @@  static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int t
     gen_set_label(l1);
 }
 
-static inline void gen_movcf_ps (int fs, int fd, int cc, int tf)
+static void gen_movcf_ps(DisasContext *ctx, int fs, int fd, int cc, int tf)
 {
     int cond;
     TCGv_i32 t0 = tcg_temp_new_i32();
@@ -6481,14 +6475,14 @@  static inline void gen_movcf_ps (int fs, int fd, int cc, int tf)
 
     tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc));
     tcg_gen_brcondi_i32(cond, t0, 0, l1);
-    gen_load_fpr32(t0, fs);
-    gen_store_fpr32(t0, fd);
+    gen_load_fpr32(ctx, t0, fs);
+    gen_store_fpr32(ctx, t0, fd);
     gen_set_label(l1);
 
     tcg_gen_andi_i32(t0, fpu_fcr31, 1 << get_fp_bit(cc+1));
     tcg_gen_brcondi_i32(cond, t0, 0, l2);
-    gen_load_fpr32h(t0, fs);
-    gen_store_fpr32h(t0, fd);
+    gen_load_fpr32h(ctx, t0, fs);
+    gen_store_fpr32h(ctx, t0, fd);
     tcg_temp_free_i32(t0);
     gen_set_label(l2);
 }
@@ -6543,11 +6537,11 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
             gen_helper_float_add_s(fp0, cpu_env, fp0, fp1);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "add.s";
@@ -6558,11 +6552,11 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
             gen_helper_float_sub_s(fp0, cpu_env, fp0, fp1);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "sub.s";
@@ -6573,11 +6567,11 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
             gen_helper_float_mul_s(fp0, cpu_env, fp0, fp1);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "mul.s";
@@ -6588,11 +6582,11 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
             gen_helper_float_div_s(fp0, cpu_env, fp0, fp1);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "div.s";
@@ -6602,9 +6596,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_sqrt_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "sqrt.s";
@@ -6613,9 +6607,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_abs_s(fp0, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "abs.s";
@@ -6624,8 +6618,8 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_store_fpr32(fp0, fd);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "mov.s";
@@ -6634,9 +6628,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_chs_s(fp0, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "neg.s";
@@ -6647,7 +6641,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32 = tcg_temp_new_i32();
             TCGv_i64 fp64 = tcg_temp_new_i64();
 
-            gen_load_fpr32(fp32, fs);
+            gen_load_fpr32(ctx, fp32, fs);
             gen_helper_float_roundl_s(fp64, cpu_env, fp32);
             tcg_temp_free_i32(fp32);
             gen_store_fpr64(ctx, fp64, fd);
@@ -6661,7 +6655,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32 = tcg_temp_new_i32();
             TCGv_i64 fp64 = tcg_temp_new_i64();
 
-            gen_load_fpr32(fp32, fs);
+            gen_load_fpr32(ctx, fp32, fs);
             gen_helper_float_truncl_s(fp64, cpu_env, fp32);
             tcg_temp_free_i32(fp32);
             gen_store_fpr64(ctx, fp64, fd);
@@ -6675,7 +6669,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32 = tcg_temp_new_i32();
             TCGv_i64 fp64 = tcg_temp_new_i64();
 
-            gen_load_fpr32(fp32, fs);
+            gen_load_fpr32(ctx, fp32, fs);
             gen_helper_float_ceill_s(fp64, cpu_env, fp32);
             tcg_temp_free_i32(fp32);
             gen_store_fpr64(ctx, fp64, fd);
@@ -6689,7 +6683,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32 = tcg_temp_new_i32();
             TCGv_i64 fp64 = tcg_temp_new_i64();
 
-            gen_load_fpr32(fp32, fs);
+            gen_load_fpr32(ctx, fp32, fs);
             gen_helper_float_floorl_s(fp64, cpu_env, fp32);
             tcg_temp_free_i32(fp32);
             gen_store_fpr64(ctx, fp64, fd);
@@ -6701,9 +6695,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_roundw_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "round.w.s";
@@ -6712,9 +6706,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_truncw_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "trunc.w.s";
@@ -6723,9 +6717,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_ceilw_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "ceil.w.s";
@@ -6734,15 +6728,15 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_floorw_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "floor.w.s";
         break;
     case OPC_MOVCF_S:
-        gen_movcf_s(fs, fd, (ft >> 2) & 0x7, ft & 0x1);
+        gen_movcf_s(ctx, fs, fd, (ft >> 2) & 0x7, ft & 0x1);
         opn = "movcf.s";
         break;
     case OPC_MOVZ_S:
@@ -6754,8 +6748,8 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
                 tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[ft], 0, l1);
             }
             fp0 = tcg_temp_new_i32();
-            gen_load_fpr32(fp0, fs);
-            gen_store_fpr32(fp0, fd);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
             gen_set_label(l1);
         }
@@ -6769,8 +6763,8 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             if (ft != 0) {
                 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[ft], 0, l1);
                 fp0 = tcg_temp_new_i32();
-                gen_load_fpr32(fp0, fs);
-                gen_store_fpr32(fp0, fd);
+                gen_load_fpr32(ctx, fp0, fs);
+                gen_store_fpr32(ctx, fp0, fd);
                 tcg_temp_free_i32(fp0);
                 gen_set_label(l1);
             }
@@ -6782,9 +6776,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_recip_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "recip.s";
@@ -6794,9 +6788,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_rsqrt_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "rsqrt.s";
@@ -6807,11 +6801,11 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, fd);
             gen_helper_float_recip2_s(fp0, cpu_env, fp0, fp1);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "recip2.s";
@@ -6821,9 +6815,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_recip1_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "recip1.s";
@@ -6833,9 +6827,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_rsqrt1_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "rsqrt1.s";
@@ -6846,11 +6840,11 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
             gen_helper_float_rsqrt2_s(fp0, cpu_env, fp0, fp1);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "rsqrt2.s";
@@ -6861,7 +6855,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32 = tcg_temp_new_i32();
             TCGv_i64 fp64 = tcg_temp_new_i64();
 
-            gen_load_fpr32(fp32, fs);
+            gen_load_fpr32(ctx, fp32, fs);
             gen_helper_float_cvtd_s(fp64, cpu_env, fp32);
             tcg_temp_free_i32(fp32);
             gen_store_fpr64(ctx, fp64, fd);
@@ -6873,9 +6867,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_cvtw_s(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "cvt.w.s";
@@ -6886,7 +6880,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32 = tcg_temp_new_i32();
             TCGv_i64 fp64 = tcg_temp_new_i64();
 
-            gen_load_fpr32(fp32, fs);
+            gen_load_fpr32(ctx, fp32, fs);
             gen_helper_float_cvtl_s(fp64, cpu_env, fp32);
             tcg_temp_free_i32(fp32);
             gen_store_fpr64(ctx, fp64, fd);
@@ -6901,8 +6895,8 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32_0 = tcg_temp_new_i32();
             TCGv_i32 fp32_1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp32_0, fs);
-            gen_load_fpr32(fp32_1, ft);
+            gen_load_fpr32(ctx, fp32_0, fs);
+            gen_load_fpr32(ctx, fp32_1, ft);
             tcg_gen_concat_i32_i64(fp64, fp32_1, fp32_0);
             tcg_temp_free_i32(fp32_1);
             tcg_temp_free_i32(fp32_0);
@@ -7103,7 +7097,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             gen_load_fpr64(ctx, fp64, fs);
             gen_helper_float_roundw_d(fp32, cpu_env, fp64);
             tcg_temp_free_i64(fp64);
-            gen_store_fpr32(fp32, fd);
+            gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(fp32);
         }
         opn = "round.w.d";
@@ -7117,7 +7111,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             gen_load_fpr64(ctx, fp64, fs);
             gen_helper_float_truncw_d(fp32, cpu_env, fp64);
             tcg_temp_free_i64(fp64);
-            gen_store_fpr32(fp32, fd);
+            gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(fp32);
         }
         opn = "trunc.w.d";
@@ -7131,7 +7125,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             gen_load_fpr64(ctx, fp64, fs);
             gen_helper_float_ceilw_d(fp32, cpu_env, fp64);
             tcg_temp_free_i64(fp64);
-            gen_store_fpr32(fp32, fd);
+            gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(fp32);
         }
         opn = "ceil.w.d";
@@ -7145,7 +7139,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             gen_load_fpr64(ctx, fp64, fs);
             gen_helper_float_floorw_d(fp32, cpu_env, fp64);
             tcg_temp_free_i64(fp64);
-            gen_store_fpr32(fp32, fd);
+            gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(fp32);
         }
         opn = "floor.w.d";
@@ -7297,7 +7291,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             gen_load_fpr64(ctx, fp64, fs);
             gen_helper_float_cvts_d(fp32, cpu_env, fp64);
             tcg_temp_free_i64(fp64);
-            gen_store_fpr32(fp32, fd);
+            gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(fp32);
         }
         opn = "cvt.s.d";
@@ -7311,7 +7305,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             gen_load_fpr64(ctx, fp64, fs);
             gen_helper_float_cvtw_d(fp32, cpu_env, fp64);
             tcg_temp_free_i64(fp64);
-            gen_store_fpr32(fp32, fd);
+            gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(fp32);
         }
         opn = "cvt.w.d";
@@ -7332,9 +7326,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_cvts_w(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "cvt.s.w";
@@ -7345,7 +7339,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp32 = tcg_temp_new_i32();
             TCGv_i64 fp64 = tcg_temp_new_i64();
 
-            gen_load_fpr32(fp32, fs);
+            gen_load_fpr32(ctx, fp32, fs);
             gen_helper_float_cvtd_w(fp64, cpu_env, fp32);
             tcg_temp_free_i32(fp32);
             gen_store_fpr64(ctx, fp64, fd);
@@ -7362,7 +7356,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             gen_load_fpr64(ctx, fp64, fs);
             gen_helper_float_cvts_l(fp32, cpu_env, fp64);
             tcg_temp_free_i64(fp64);
-            gen_store_fpr32(fp32, fd);
+            gen_store_fpr32(ctx, fp32, fd);
             tcg_temp_free_i32(fp32);
         }
         opn = "cvt.s.l";
@@ -7473,7 +7467,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         break;
     case OPC_MOVCF_PS:
         check_cp1_64bitmode(ctx);
-        gen_movcf_ps(fs, fd, (ft >> 2) & 0x7, ft & 0x1);
+        gen_movcf_ps(ctx, fs, fd, (ft >> 2) & 0x7, ft & 0x1);
         opn = "movcf.ps";
         break;
     case OPC_MOVZ_PS:
@@ -7598,9 +7592,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32h(fp0, fs);
+            gen_load_fpr32h(ctx, fp0, fs);
             gen_helper_float_cvts_pu(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "cvt.s.pu";
@@ -7622,9 +7616,9 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             gen_helper_float_cvts_pl(fp0, cpu_env, fp0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "cvt.s.pl";
@@ -7635,10 +7629,10 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
-            gen_store_fpr32h(fp0, fd);
-            gen_store_fpr32(fp1, fd);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
+            gen_store_fpr32h(ctx, fp0, fd);
+            gen_store_fpr32(ctx, fp1, fd);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
         }
@@ -7650,10 +7644,10 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32h(fp1, ft);
-            gen_store_fpr32(fp1, fd);
-            gen_store_fpr32h(fp0, fd);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32h(ctx, fp1, ft);
+            gen_store_fpr32(ctx, fp1, fd);
+            gen_store_fpr32h(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
         }
@@ -7665,10 +7659,10 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32h(fp0, fs);
-            gen_load_fpr32(fp1, ft);
-            gen_store_fpr32(fp1, fd);
-            gen_store_fpr32h(fp0, fd);
+            gen_load_fpr32h(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
+            gen_store_fpr32(ctx, fp1, fd);
+            gen_store_fpr32h(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
         }
@@ -7680,10 +7674,10 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv_i32 fp1 = tcg_temp_new_i32();
 
-            gen_load_fpr32h(fp0, fs);
-            gen_load_fpr32h(fp1, ft);
-            gen_store_fpr32(fp1, fd);
-            gen_store_fpr32h(fp0, fd);
+            gen_load_fpr32h(ctx, fp0, fs);
+            gen_load_fpr32h(ctx, fp1, ft);
+            gen_store_fpr32(ctx, fp1, fd);
+            gen_store_fpr32h(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
         }
@@ -7757,7 +7751,7 @@  static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
 
             tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
             tcg_gen_trunc_tl_i32(fp0, t0);
-            gen_store_fpr32(fp0, fd);
+            gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(fp0);
         }
         opn = "lwxc1";
@@ -7792,7 +7786,7 @@  static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
             TCGv_i32 fp0 = tcg_temp_new_i32();
             TCGv t1 = tcg_temp_new();
 
-            gen_load_fpr32(fp0, fs);
+            gen_load_fpr32(ctx, fp0, fs);
             tcg_gen_extu_i32_tl(t1, fp0);
             tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
             tcg_temp_free_i32(fp0);
@@ -7852,24 +7846,24 @@  static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
             tcg_gen_andi_tl(t0, t0, 0x7);
 
             tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
-            gen_load_fpr32(fp, fs);
-            gen_load_fpr32h(fph, fs);
-            gen_store_fpr32(fp, fd);
-            gen_store_fpr32h(fph, fd);
+            gen_load_fpr32(ctx, fp, fs);
+            gen_load_fpr32h(ctx, fph, fs);
+            gen_store_fpr32(ctx, fp, fd);
+            gen_store_fpr32h(ctx, fph, fd);
             tcg_gen_br(l2);
             gen_set_label(l1);
             tcg_gen_brcondi_tl(TCG_COND_NE, t0, 4, l2);
             tcg_temp_free(t0);
 #ifdef TARGET_WORDS_BIGENDIAN
-            gen_load_fpr32(fp, fs);
-            gen_load_fpr32h(fph, ft);
-            gen_store_fpr32h(fp, fd);
-            gen_store_fpr32(fph, fd);
+            gen_load_fpr32(ctx, fp, fs);
+            gen_load_fpr32h(ctx, fph, ft);
+            gen_store_fpr32h(ctx, fp, fd);
+            gen_store_fpr32(ctx, fph, fd);
 #else
-            gen_load_fpr32h(fph, fs);
-            gen_load_fpr32(fp, ft);
-            gen_store_fpr32(fph, fd);
-            gen_store_fpr32h(fp, fd);
+            gen_load_fpr32h(ctx, fph, fs);
+            gen_load_fpr32(ctx, fp, ft);
+            gen_store_fpr32(ctx, fph, fd);
+            gen_store_fpr32h(ctx, fp, fd);
 #endif
             gen_set_label(l2);
             tcg_temp_free_i32(fp);
@@ -7884,13 +7878,13 @@  static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
             TCGv_i32 fp1 = tcg_temp_new_i32();
             TCGv_i32 fp2 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
-            gen_load_fpr32(fp2, fr);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
+            gen_load_fpr32(ctx, fp2, fr);
             gen_helper_float_muladd_s(fp2, cpu_env, fp0, fp1, fp2);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp2, fd);
+            gen_store_fpr32(ctx, fp2, fd);
             tcg_temp_free_i32(fp2);
         }
         opn = "madd.s";
@@ -7939,13 +7933,13 @@  static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
             TCGv_i32 fp1 = tcg_temp_new_i32();
             TCGv_i32 fp2 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
-            gen_load_fpr32(fp2, fr);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
+            gen_load_fpr32(ctx, fp2, fr);
             gen_helper_float_mulsub_s(fp2, cpu_env, fp0, fp1, fp2);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp2, fd);
+            gen_store_fpr32(ctx, fp2, fd);
             tcg_temp_free_i32(fp2);
         }
         opn = "msub.s";
@@ -7994,13 +7988,13 @@  static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
             TCGv_i32 fp1 = tcg_temp_new_i32();
             TCGv_i32 fp2 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
-            gen_load_fpr32(fp2, fr);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
+            gen_load_fpr32(ctx, fp2, fr);
             gen_helper_float_nmuladd_s(fp2, cpu_env, fp0, fp1, fp2);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp2, fd);
+            gen_store_fpr32(ctx, fp2, fd);
             tcg_temp_free_i32(fp2);
         }
         opn = "nmadd.s";
@@ -8049,13 +8043,13 @@  static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
             TCGv_i32 fp1 = tcg_temp_new_i32();
             TCGv_i32 fp2 = tcg_temp_new_i32();
 
-            gen_load_fpr32(fp0, fs);
-            gen_load_fpr32(fp1, ft);
-            gen_load_fpr32(fp2, fr);
+            gen_load_fpr32(ctx, fp0, fs);
+            gen_load_fpr32(ctx, fp1, ft);
+            gen_load_fpr32(ctx, fp2, fr);
             gen_helper_float_nmulsub_s(fp2, cpu_env, fp0, fp1, fp2);
             tcg_temp_free_i32(fp0);
             tcg_temp_free_i32(fp1);
-            gen_store_fpr32(fp2, fd);
+            gen_store_fpr32(ctx, fp2, fd);
             tcg_temp_free_i32(fp2);
         }
         opn = "nmsub.s";
@@ -10996,13 +10990,13 @@  static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
                 case MOVF_FMT:
                     switch (fmt) {
                     case FMT_SDPS_S:
-                        gen_movcf_s(rs, rt, cc, 0);
+                        gen_movcf_s(ctx, rs, rt, cc, 0);
                         break;
                     case FMT_SDPS_D:
                         gen_movcf_d(ctx, rs, rt, cc, 0);
                         break;
                     case FMT_SDPS_PS:
-                        gen_movcf_ps(rs, rt, cc, 0);
+                        gen_movcf_ps(ctx, rs, rt, cc, 0);
                         break;
                     default:
                         goto pool32f_invalid;
@@ -11011,13 +11005,13 @@  static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
                 case MOVT_FMT:
                     switch (fmt) {
                     case FMT_SDPS_S:
-                        gen_movcf_s(rs, rt, cc, 1);
+                        gen_movcf_s(ctx, rs, rt, cc, 1);
                         break;
                     case FMT_SDPS_D:
                         gen_movcf_d(ctx, rs, rt, cc, 1);
                         break;
                     case FMT_SDPS_PS:
-                        gen_movcf_ps(rs, rt, cc, 1);
+                        gen_movcf_ps(ctx, rs, rt, cc, 1);
                         break;
                     default:
                         goto pool32f_invalid;