Patchwork [1/7] target-mips: Set opn in gen_ldst_multiple.

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Submitter Richard Henderson
Date Sept. 17, 2012, 9:35 p.m.
Message ID <1347917713-23343-2-git-send-email-rth@twiddle.net>
Download mbox | patch
Permalink /patch/184561/
State New
Headers show

Comments

Richard Henderson - Sept. 17, 2012, 9:35 p.m.
Used by MIPS_DEBUG, when enabled.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-mips/translate.c | 6 ++++++
 1 file changed, 6 insertions(+)
Aurelien Jarno - Sept. 18, 2012, 4:38 p.m.
On Mon, Sep 17, 2012 at 02:35:07PM -0700, Richard Henderson wrote:
> Used by MIPS_DEBUG, when enabled.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target-mips/translate.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 52eeb2b..50153a9 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -9855,6 +9855,7 @@ static void gen_andi16 (CPUMIPSState *env, DisasContext *ctx)
>  static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist,
>                                 int base, int16_t offset)
>  {
> +    const char *opn = "ldst_multiple";
>      TCGv t0, t1;
>      TCGv_i32 t2;
>  
> @@ -9874,19 +9875,24 @@ static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist,
>      switch (opc) {
>      case LWM32:
>          gen_helper_lwm(cpu_env, t0, t1, t2);
> +        opn = "lwm";
>          break;
>      case SWM32:
>          gen_helper_swm(cpu_env, t0, t1, t2);
> +        opn = "swm";
>          break;
>  #ifdef TARGET_MIPS64
>      case LDM:
>          gen_helper_ldm(cpu_env, t0, t1, t2);
> +        opn = "ldm";
>          break;
>      case SDM:
>          gen_helper_sdm(cpu_env, t0, t1, t2);
> +        opn = "sdm";
>          break;
>  #endif
>      }
> +    (void)opn;
>      MIPS_DEBUG("%s, %x, %d(%s)", opn, reglist, offset, regnames[base]);
>      tcg_temp_free(t0);
>      tcg_temp_free(t1);
> -- 
> 1.7.11.4
> 

Looks fine to me.

Acked-by: Aurelien Jarno <aurelien@aurel32.net>

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 52eeb2b..50153a9 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -9855,6 +9855,7 @@  static void gen_andi16 (CPUMIPSState *env, DisasContext *ctx)
 static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist,
                                int base, int16_t offset)
 {
+    const char *opn = "ldst_multiple";
     TCGv t0, t1;
     TCGv_i32 t2;
 
@@ -9874,19 +9875,24 @@  static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist,
     switch (opc) {
     case LWM32:
         gen_helper_lwm(cpu_env, t0, t1, t2);
+        opn = "lwm";
         break;
     case SWM32:
         gen_helper_swm(cpu_env, t0, t1, t2);
+        opn = "swm";
         break;
 #ifdef TARGET_MIPS64
     case LDM:
         gen_helper_ldm(cpu_env, t0, t1, t2);
+        opn = "ldm";
         break;
     case SDM:
         gen_helper_sdm(cpu_env, t0, t1, t2);
+        opn = "sdm";
         break;
 #endif
     }
+    (void)opn;
     MIPS_DEBUG("%s, %x, %d(%s)", opn, reglist, offset, regnames[base]);
     tcg_temp_free(t0);
     tcg_temp_free(t1);