From patchwork Fri Sep 14 05:07:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tetsuyuki Kobayashi X-Patchwork-Id: 183797 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 49CA02C0087 for ; Fri, 14 Sep 2012 15:10:40 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0956228155; Fri, 14 Sep 2012 07:10:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id x88Gq+SeHmu3; Fri, 14 Sep 2012 07:10:38 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B549228145; Fri, 14 Sep 2012 07:10:35 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5313128145 for ; Fri, 14 Sep 2012 07:10:33 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Tlb3nnsOIVcm for ; Fri, 14 Sep 2012 07:10:29 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from vrgw5.firstserver.ne.jp (vrgw5.firstserver.ne.jp [164.46.1.48]) by theia.denx.de (Postfix) with ESMTPS id AB27528144 for ; Fri, 14 Sep 2012 07:10:24 +0200 (CEST) Received: from fvrsp22.firstserver.ne.jp (fvrsp22.firstserver.ne.jp [203.183.196.4]) by vrgw5.firstserver.ne.jp (8.13.8/8.13.8/FirstServer) with ESMTP id q8E5A9h8014236; Fri, 14 Sep 2012 14:10:09 +0900 (envelope-from koba@kmckk.co.jp) Received: from 203.137.25.97 (203.137.25.97) by fvrsp22.firstserver.ne.jp (F-Secure/virusgw_smtp/407/fvrsp22.firstserver.ne.jp); Fri, 14 Sep 2012 14:10:09 +0900 (JST) X-Virus-Status: clean(F-Secure/virusgw_smtp/407/fvrsp22.firstserver.ne.jp) Received: from localhost (58-188-103-12f2.kns1.eonet.ne.jp [58.188.103.12]) (authenticated (0 bits)) by mail.kmckk.co.jp (8.14.3/8.11.3) with ESMTP id q8E5A9AW020803; Fri, 14 Sep 2012 14:10:09 +0900 From: Tetsuyuki Kobayashi To: nobuhiro.iwamatsu.yj@renesas.com Date: Fri, 14 Sep 2012 14:07:58 +0900 Message-Id: <1347599285-11830-4-git-send-email-koba@kmckk.co.jp> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1347599285-11830-1-git-send-email-koba@kmckk.co.jp> References: <1347439573-19443-1-git-send-email-koba@kmckk.co.jp> <1347599285-11830-1-git-send-email-koba@kmckk.co.jp> Cc: hs@denx.de, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 03/10] i2c: sh_i2c.c: adjust for SH73A0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0. After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board. Acked-by: Nobuhiro Iwamatsu Signed-off-by: Tetsuyuki Kobayashi --- Changes for v2: - none Changes for v3: - none drivers/i2c/sh_i2c.c | 4 ++++ include/configs/kzm9g.h | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index 03dfa7a..6c6a141 100644 --- a/drivers/i2c/sh_i2c.c +++ b/drivers/i2c/sh_i2c.c @@ -151,8 +151,12 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg) { u8 ret; +#if defined(CONFIG_SH73A0) + i2c_set_addr(base, id, reg, 0); +#else i2c_set_addr(base, id, reg, 1); udelay(100); +#endif writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr); irq_dte(base); diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 8877516..abeab69 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -164,7 +164,7 @@ #define CONFIG_SYS_I2C_SLAVE (0x7F) #define CONFIG_SH_I2C_DATA_HIGH (4) #define CONFIG_SH_I2C_DATA_LOW (5) -#define CONFIG_SH_I2C_CLOCK (41666666) +#define CONFIG_SH_I2C_CLOCK (104000000) /* 104 MHz */ #define CONFIG_SH_I2C_BASE0 (0xE6820000) #define CONFIG_SH_I2C_BASE1 (0xE6822000)