Patchwork [AArch64] Fix vfmaq_lane_f64.

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Submitter Tejas Belagod
Date Sept. 10, 2012, 3:18 p.m.
Message ID <504E04B0.9060503@arm.com>
Download mbox | patch
Permalink /patch/182908/
State New
Headers show

Comments

Tejas Belagod - Sept. 10, 2012, 3:18 p.m.
Hi,

This patch fixes vfmaq_lane_f64 () AdvSIMD intrinsic.

Regression-tested on aarch64-none-elf. OK for aarch64-branch?

Thanks,
Tejas Belagod.
ARM.

Changelog:

2012-09-10  Tejas Belagod  <tejas.belagod@arm.com>

gcc/
         * config/aarch64/arm_neon.h (vfmaq_lane_f64): Fix prototype and
         assembler template accordingly.
Marcus Shawcroft - Sept. 25, 2012, 6:06 p.m.
On 10/09/12 16:18, Tejas Belagod wrote:
> 2012-09-10  Tejas Belagod<tejas.belagod@arm.com>
>
> gcc/
>           * config/aarch64/arm_neon.h (vfmaq_lane_f64): Fix prototype and
>           assembler template accordingly.

Committed to aarch64-branch and aarch64-4.7-branch.

/Marcus

Patch

diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index de3a2f2..54eb29c 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -7859,15 +7859,16 @@  vfmaq_f64 (float64x2_t a, float64x2_t b, float64x2_t c)
        result;                                                          \
      })
 
-#define vfmaq_lane_f64(a, b, c)                                         \
+#define vfmaq_lane_f64(a, b, c, d)                                      \
   __extension__                                                         \
     ({                                                                  \
+       float64x2_t c_ = (c);                                            \
        float64x2_t b_ = (b);                                            \
        float64x2_t a_ = (a);                                            \
        float64x2_t result;                                              \
-       __asm__ ("fmla %0.2d,%1.2d,%2.d[%3]"                             \
+       __asm__ ("fmla %0.2d,%2.2d,%3.d[%4]"                             \
                 : "=w"(result)                                          \
-                : "w"(a_), "w"(b_), "i"(c)                              \
+                : "0"(a_), "w"(b_), "w"(c_), "i"(d)                     \
                 : /* No clobbers */);                                   \
        result;                                                          \
      })