Patchwork [AArch64] Expand binary operations' constant operands for neon intrinsics.

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Submitter Tejas Belagod
Date Sept. 10, 2012, 3:02 p.m.
Message ID <504E00EF.2060509@arm.com>
Download mbox | patch
Permalink /patch/182904/
State New
Headers show

Comments

Tejas Belagod - Sept. 10, 2012, 3:02 p.m.
Hi,

This patch expands an Advanced SIMD intrinsic's operand into a constant operand 
only if the predicate allows it.

Regression-tested on aarch64-none-elf. OK for aarch64-branch?

Thanks,
Tejas Belagod
ARM.

Changelog

2012-09-10  Tejas Belagod  <tejas.belagod@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_simd_expand_builtin): Expand binary
	operations' constant operand only if the predicate allows it.
Marcus Shawcroft - Sept. 25, 2012, 5:46 p.m.
On 10/09/12 16:02, Tejas Belagod wrote:
>
> Hi,
>
> This patch expands an Advanced SIMD intrinsic's operand into a constant operand
> only if the predicate allows it.
>
> Regression-tested on aarch64-none-elf. OK for aarch64-branch?
>
> Thanks,
> Tejas Belagod
> ARM.
>
> Changelog
>
> 2012-09-10  Tejas Belagod<tejas.belagod@arm.com>
>
> gcc/
> 	* config/aarch64/aarch64.c (aarch64_simd_expand_builtin): Expand binary
> 	operations' constant operand only if the predicate allows it.

Committed to aarch64-branch and aarch64-4.7-branch.
/Marcus

Patch

diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index 04cc48a..731f369 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -1215,13 +1215,17 @@  aarch64_simd_expand_builtin (int fcode, tree exp, rtx target)
 
     case AARCH64_SIMD_BINOP:
       {
-	bool op1_const_int_p
-	  = CONST_INT_P (expand_normal (CALL_EXPR_ARG (exp, 1)));
-	return aarch64_simd_expand_args (target, icode, 1, exp,
-					 SIMD_ARG_COPY_TO_REG,
-					 op1_const_int_p ? SIMD_ARG_CONSTANT
-							 : SIMD_ARG_COPY_TO_REG,
-					 SIMD_ARG_STOP);
+        rtx arg2 = expand_normal (CALL_EXPR_ARG (exp, 1));
+        /* Handle constants only if the predicate allows it.  */
+	bool op1_const_int_p =
+	  (CONST_INT_P (arg2)
+	   && (*insn_data[icode].operand[2].predicate)
+		(arg2, insn_data[icode].operand[2].mode));
+	return aarch64_simd_expand_args
+	  (target, icode, 1, exp,
+	   SIMD_ARG_COPY_TO_REG,
+	   op1_const_int_p ? SIMD_ARG_CONSTANT : SIMD_ARG_COPY_TO_REG,
+	   SIMD_ARG_STOP);
       }
 
     case AARCH64_SIMD_TERNOP: