From patchwork Sun Sep 9 21:05:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182751 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D55BE2C008E for ; Mon, 10 Sep 2012 09:23:15 +1000 (EST) Received: from localhost ([::1]:57333 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAqqP-0006Rr-W5 for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 19:23:13 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56845) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoj2-0008JG-6h for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoj0-00067X-O2 for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:28 -0400 Received: from mail-pz0-f45.google.com ([209.85.210.45]:63059) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoj0-0005pO-Hi for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:26 -0400 Received: by mail-pz0-f45.google.com with SMTP id n15so968311dad.4 for ; Sun, 09 Sep 2012 14:07:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=Vt7e71m6veyHpTZ+9GYhLlMTTazj1D/BAdgPwCowLKA=; b=0bNx/IloEzn7xKMJjak1h01arSV3hzfSS7ZgfwVXaqXQNGxlXM/drnRkGtpLEEZW1T a+hvumhb0l/MdFEjDFLmVHK0eKcx4Md/Ebs1zydAm+StyCUNs+GOIJZJYFjcV3W15lIL G5t0GB2LdcJHcf907w4XaGTxIj0z0GBFusWktAaEHw6MjL6T68GmcNunQ1l+o+XA5H+e XdcCNioyu/yRyW07kV1r9HBD+Bba4X6hdlnLF5cXAPJzoqn3RCFPrFQDeRoh87QsfV1a iuWgLAJJhdkAZ42VpSkGFt2d6itotm4AQphNrQDGDMMu1TV9rYuskDNfVK8n+ry/I64b 76hQ== Received: by 10.66.83.33 with SMTP id n1mr18013554pay.66.1347224846288; Sun, 09 Sep 2012 14:07:26 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.07.25 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:07:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:05:19 -0700 Message-Id: <1347224784-19472-62-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.210.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 061/126] target-s390: Convert COMPARE AND SWAP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/helper.h | 4 +-- target-s390x/insn-data.def | 9 ++++++ target-s390x/mem_helper.c | 33 +++++++++----------- target-s390x/translate.c | 78 ++++++++++++++++++++++++---------------------- 4 files changed, 66 insertions(+), 58 deletions(-) diff --git a/target-s390x/helper.h b/target-s390x/helper.h index 4a041cb..38b9aa4 100644 --- a/target-s390x/helper.h +++ b/target-s390x/helper.h @@ -29,9 +29,9 @@ DEF_HELPER_4(srst, i32, env, i32, i32, i32) DEF_HELPER_4(clst, i32, env, i32, i32, i32) DEF_HELPER_4(mvpg, void, env, i64, i64, i64) DEF_HELPER_4(mvst, void, env, i32, i32, i32) -DEF_HELPER_4(csg, i32, env, i32, i64, i32) +DEF_HELPER_4(csg, i64, env, i64, i64, i64) DEF_HELPER_4(cdsg, i32, env, i32, i64, i32) -DEF_HELPER_4(cs, i32, env, i32, i64, i32) +DEF_HELPER_4(cs, i64, env, i64, i64, i64) DEF_HELPER_5(ex, i32, env, i32, i64, i64, i64) DEF_HELPER_FLAGS_1(abs_i32, TCG_CALL_PURE|TCG_CALL_CONST, i32, s32) DEF_HELPER_FLAGS_1(nabs_i32, TCG_CALL_PURE|TCG_CALL_CONST, s32, s32) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 522fe12..d2c9671 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -137,6 +137,15 @@ /* COMPARE LOGICAL LONG EXTENDED */ C(0xa900, CLCLE, RS_a, Z, 0, a2, 0, 0, clcle, 0) +/* COMPARE AND SWAP */ + C(0xba00, CS, RS_a, Z, r1_o, a2, new, r1_32, cs, 0) + C(0xeb14, CSY, RSY_a, LD, r1_o, a2, new, r1_32, cs, 0) + C(0xeb30, CSG, RSY_a, Z, r1_o, a2, r1, 0, csg, 0) +/* COMPARE DOUBLE AND SWAP */ + C(0xbb00, CDS, RS_a, Z, r1_P32, a2, new, r1_P32, cds, 0) + C(0xeb31, CDSY, RSY_a, LD, r1_P32, a2, new, r1_P32, cds, 0) + C(0xeb3e, CDSG, RSY_a, Z, 0, a2, 0, 0, cdsg, 0) + /* CONVERT TO DECIMAL */ C(0x4e00, CVD, RX_a, Z, r1_o, a2, 0, 0, cvd, 0) C(0xe326, CVDY, RXY_a, LD, r1_o, a2, 0, 0, cvd, 0) diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c index 961f748..90d2c39 100644 --- a/target-s390x/mem_helper.c +++ b/target-s390x/mem_helper.c @@ -463,20 +463,18 @@ void HELPER(mvst)(CPUS390XState *env, uint32_t c, uint32_t r1, uint32_t r2) } /* compare and swap 64-bit */ -uint32_t HELPER(csg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) +uint64_t HELPER(csg)(CPUS390XState *env, uint64_t r1, uint64_t a2, uint64_t r3) { /* FIXME: locking? */ - uint32_t cc; uint64_t v2 = cpu_ldq_data(env, a2); - - if (env->regs[r1] == v2) { - cc = 0; - cpu_stq_data(env, a2, env->regs[r3]); + if (r1 == v2) { + cpu_stq_data(env, a2, r3); + env->cc_op = 0; + return r1; } else { - cc = 1; - env->regs[r1] = v2; + env->cc_op = 1; + return v2; } - return cc; } /* compare double and swap 64-bit */ @@ -503,21 +501,18 @@ uint32_t HELPER(cdsg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) } /* compare and swap 32-bit */ -uint32_t HELPER(cs)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) +uint64_t HELPER(cs)(CPUS390XState *env, uint64_t r1, uint64_t a2, uint64_t r3) { /* FIXME: locking? */ - uint32_t cc; uint32_t v2 = cpu_ldl_data(env, a2); - - HELPER_LOG("%s: r1 %d a2 0x%lx r3 %d\n", __func__, r1, a2, r3); - if (((uint32_t)env->regs[r1]) == v2) { - cc = 0; - cpu_stl_data(env, a2, (uint32_t)env->regs[r3]); + if ((uint32_t)r1 == v2) { + cpu_stl_data(env, a2, (uint32_t)r3); + env->cc_op = 0; + return r1; } else { - cc = 1; - env->regs[r1] = (env->regs[r1] & 0xffffffff00000000ULL) | v2; + env->cc_op = 1; + return v2; } - return cc; } static uint32_t helper_icm(CPUS390XState *env, uint32_t r1, uint64_t address, diff --git a/target-s390x/translate.c b/target-s390x/translate.c index d08b42f..dcb663d 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1142,30 +1142,6 @@ static void disas_eb(DisasContext *s, int op, int r1, int r3, int b2, int d2) tcg_temp_free_i32(tmp32_2); break; #endif - case 0x30: /* CSG R1,R3,D2(B2) [RSY] */ - tmp = get_address(s, 0, b2, d2); - tmp32_1 = tcg_const_i32(r1); - tmp32_2 = tcg_const_i32(r3); - potential_page_fault(s); - /* XXX rewrite in tcg */ - gen_helper_csg(cc_op, cpu_env, tmp32_1, tmp, tmp32_2); - set_cc_static(s); - tcg_temp_free_i64(tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i32(tmp32_2); - break; - case 0x3e: /* CDSG R1,R3,D2(B2) [RSY] */ - tmp = get_address(s, 0, b2, d2); - tmp32_1 = tcg_const_i32(r1); - tmp32_2 = tcg_const_i32(r3); - potential_page_fault(s); - /* XXX rewrite in tcg */ - gen_helper_cdsg(cc_op, cpu_env, tmp32_1, tmp, tmp32_2); - set_cc_static(s); - tcg_temp_free_i64(tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i32(tmp32_2); - break; default: LOG_DISAS("illegal eb operation 0x%x\n", op); gen_illegal_opcode(s); @@ -2014,19 +1990,6 @@ static void disas_s390_insn(DisasContext *s) op = (insn >> 16) & 0xff; disas_b9(s, op, r1, r2); break; - case 0xba: /* CS R1,R3,D2(B2) [RS] */ - insn = ld_code4(s->pc); - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp32_1 = tcg_const_i32(r1); - tmp32_2 = tcg_const_i32(r3); - potential_page_fault(s); - gen_helper_cs(cc_op, cpu_env, tmp32_1, tmp, tmp32_2); - set_cc_static(s); - tcg_temp_free_i64(tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i32(tmp32_2); - break; case 0xbd: /* CLM R1,M3,D2(B2) [RS] */ insn = ld_code4(s->pc); decode_rs(s, insn, &r1, &r3, &b2, &d2); @@ -2614,6 +2577,47 @@ static ExitStatus op_clcle(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_cs(DisasContext *s, DisasOps *o) +{ + int r3 = get_field(s->fields, r3); + potential_page_fault(s); + gen_helper_cs(o->out, cpu_env, o->in1, o->in2, regs[r3]); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_csg(DisasContext *s, DisasOps *o) +{ + int r3 = get_field(s->fields, r3); + potential_page_fault(s); + gen_helper_csg(o->out, cpu_env, o->in1, o->in2, regs[r3]); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_cds(DisasContext *s, DisasOps *o) +{ + int r3 = get_field(s->fields, r3); + TCGv_i64 in3 = tcg_temp_new_i64(); + tcg_gen_deposit_i64(in3, regs[r3 + 1], regs[r3], 32, 32); + potential_page_fault(s); + gen_helper_csg(o->out, cpu_env, o->in1, o->in2, in3); + tcg_temp_free_i64(in3); + set_cc_static(s); + return NO_EXIT; +} + +static ExitStatus op_cdsg(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3)); + potential_page_fault(s); + /* XXX rewrite in tcg */ + gen_helper_cdsg(cc_op, cpu_env, r1, o->in2, r3); + set_cc_static(s); + return NO_EXIT; +} + static ExitStatus op_cvd(DisasContext *s, DisasOps *o) { TCGv_i64 t1 = tcg_temp_new_i64();