From patchwork Sun Sep 9 21:05:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182743 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1542A2C0086 for ; Mon, 10 Sep 2012 09:15:18 +1000 (EST) Received: from localhost ([::1]:45587 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAqii-0004Hi-3d for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 19:15:16 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57152) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAojK-00007l-On for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAojH-0006DZ-Uk for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:46 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:59699) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAojH-0005pQ-PT for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:43 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so291958pbb.4 for ; Sun, 09 Sep 2012 14:07:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=Z5s6XeS6uhpW54AaO2XRPhCk7gA10cNZTJpmgHxcmwM=; b=ZGmEWv1yg7b3ZHksl7gmMtzXeM0NXnnu2cqD3BojqZ4VjiKcrgYoLIo9yqMRH/M5gx nygBH8WwzR8eeLl3W2uUqbXF3PhoxiE7I3GvXbdZ5ISawzdpQqUaqqWdfsOSUzX3df2i eY/Psgpm5fEgm9OM7Qt5Wkl0XlsMaC8FCB/hTSKyg9A7OWREV6W39dJEIwZO1CFnYX+n Te3Edl4NyW3TGI0CLWWNwT3VBlgFukLJWDXCfSskdzuIfuMEunOuAnlfcvUpgBWjJN6z 6ZR+I5u1uhYsRUYyq4oVezDR+9qlP+xVZGHewZpzA9vYSt8rVp7MuJ7lOTYbrnZX6GjI 0kow== Received: by 10.68.229.73 with SMTP id so9mr2065388pbc.66.1347224863532; Sun, 09 Sep 2012 14:07:43 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.07.42 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:07:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:05:39 -0700 Message-Id: <1347224784-19472-82-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 081/126] target-s390: Convert LFPC, SFPC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Note that we were failing to set the rounding mode in fpu_status. Signed-off-by: Richard Henderson --- target-s390x/fpu_helper.c | 17 +++++++++++++ target-s390x/helper.h | 1 + target-s390x/insn-data.def | 6 +++++ target-s390x/translate.c | 63 ++++++---------------------------------------- 4 files changed, 31 insertions(+), 56 deletions(-) diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c index b6cc45b..4f5a29f 100644 --- a/target-s390x/fpu_helper.c +++ b/target-s390x/fpu_helper.c @@ -578,3 +578,20 @@ uint64_t HELPER(sqxb)(CPUS390XState *env, uint64_t ah, uint64_t al) handle_exceptions(env, GETPC()); return RET128(ret); } + +/* set fpc */ +void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) +{ + static const int rnd[4] = { + float_round_nearest_even, + float_round_to_zero, + float_round_up, + float_round_down + }; + + /* Install everything in the main FPC. */ + env->fpc = fpc; + + /* Install the rounding mode in the shadow fpu_status. */ + set_float_rounding_mode(rnd[fpc & 3], &env->fpu_status); +} diff --git a/target-s390x/helper.h b/target-s390x/helper.h index 0ba0342..29f1565 100644 --- a/target-s390x/helper.h +++ b/target-s390x/helper.h @@ -120,6 +120,7 @@ DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_CONST, void, env) DEF_HELPER_2(lra, i64, env, i64) DEF_HELPER_3(stura, void, env, i64, i32) DEF_HELPER_3(cksm, void, env, i32, i32) +DEF_HELPER_FLAGS_2(sfpc, TCG_CALL_CONST, void, env, i64) DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_PURE|TCG_CALL_CONST, i32, env, i32, i64, i64, i64) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index f08a37e..652c7ad 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -351,6 +351,9 @@ C(0xb375, LZDR, RRE, Z, 0, 0, 0, f1, zero, 0) C(0xb376, LZXR, RRE, Z, 0, 0, 0, x1, zero2, 0) +/* LOAD FPC */ + C(0xb29d, LFPC, S, Z, 0, m2_32u, 0, 0, sfpc, 0) + /* LOAD LENGTHENED */ C(0xb304, LDEBR, RRE, Z, 0, e2, f1, 0, ldeb, 0) C(0xb305, LXDBR, RRE, Z, 0, f2_o, x1, 0, lxdb, 0) @@ -455,6 +458,9 @@ C(0xeb1d, RLL, RSY_a, Z, r3_o, sh32, new, r1_32, rll32, 0) C(0xeb1c, RLLG, RSY_a, Z, r3_o, sh64, r1, 0, rll64, 0) +/* SET FPC */ + C(0xb384, SFPC, RRE, Z, 0, r1_o, 0, 0, sfpc, 0) + /* SHIFT LEFT SINGLE */ D(0x8b00, SLA, RS_a, Z, r1, sh32, new, r1_32, sla, 0, 31) D(0xebdd, SLAK, RSY_a, DO, r3, sh32, new, r1_32, sla, 0, 31) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index f07bed1..4fbade5 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1334,18 +1334,6 @@ static void disas_b2(DisasContext *s, int op, uint32_t insn) tcg_temp_free_i32(tmp32_1); tcg_temp_free_i32(tmp32_2); break; - case 0x9d: /* LFPC D2(B2) [S] */ - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp2 = tcg_temp_new_i64(); - tmp32_1 = tcg_temp_new_i32(); - tcg_gen_qemu_ld32u(tmp2, tmp, get_mem_index(s)); - tcg_gen_trunc_i64_i32(tmp32_1, tmp2); - tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc)); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - tcg_temp_free_i32(tmp32_1); - break; case 0xb1: /* STFL D2(B2) [S] */ /* Store Facility List (CPU features) at 200 */ check_privileged(s); @@ -1391,46 +1379,11 @@ static void disas_b2(DisasContext *s, int op, uint32_t insn) } } -static void disas_b3(DisasContext *s, int op, int m3, int r1, int r2) -{ - TCGv_i32 tmp32_1; - LOG_DISAS("disas_b3: op 0x%x m3 0x%x r1 %d r2 %d\n", op, m3, r1, r2); -#define FP_HELPER(i) \ - tmp32_1 = tcg_const_i32(r1); \ - tmp32_2 = tcg_const_i32(r2); \ - gen_helper_ ## i(cpu_env, tmp32_1, tmp32_2); \ - tcg_temp_free_i32(tmp32_1); \ - tcg_temp_free_i32(tmp32_2); - -#define FP_HELPER_CC(i) \ - tmp32_1 = tcg_const_i32(r1); \ - tmp32_2 = tcg_const_i32(r2); \ - gen_helper_ ## i(cc_op, cpu_env, tmp32_1, tmp32_2); \ - set_cc_static(s); \ - tcg_temp_free_i32(tmp32_1); \ - tcg_temp_free_i32(tmp32_2); - - switch (op) { - case 0x84: /* SFPC R1 [RRE] */ - tmp32_1 = load_reg32(r1); - tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc)); - tcg_temp_free_i32(tmp32_1); - break; - default: - LOG_DISAS("illegal b3 operation 0x%x\n", op); - gen_illegal_opcode(s); - break; - } - -#undef FP_HELPER_CC -#undef FP_HELPER -} - static void disas_s390_insn(DisasContext *s) { unsigned char opc; uint64_t insn; - int op, r1, r2, r3; + int op; opc = cpu_ldub_code(cpu_single_env, s->pc); LOG_DISAS("opc 0x%x\n", opc); @@ -1441,14 +1394,6 @@ static void disas_s390_insn(DisasContext *s) op = (insn >> 16) & 0xff; disas_b2(s, op, insn); break; - case 0xb3: - insn = ld_code4(s->pc); - op = (insn >> 16) & 0xff; - r3 = (insn >> 12) & 0xf; /* aka m3 */ - r1 = (insn >> 4) & 0xf; - r2 = insn & 0xf; - disas_b3(s, op, r3, r1, r2); - break; default: qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%x\n", opc); gen_illegal_opcode(s); @@ -2919,6 +2864,12 @@ static ExitStatus op_srl(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_sfpc(DisasContext *s, DisasOps *o) +{ + gen_helper_sfpc(cpu_env, o->in2); + return NO_EXIT; +} + #ifndef CONFIG_USER_ONLY static ExitStatus op_ssm(DisasContext *s, DisasOps *o) {