From patchwork Sun Sep 9 21:05:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182660 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1810A2C0097 for ; Mon, 10 Sep 2012 07:36:11 +1000 (EST) Received: from localhost ([::1]:47628 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TApAn-0005Fs-7x for incoming@patchwork.ozlabs.org; Sun, 09 Sep 2012 17:36:09 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56919) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoj6-0008Mn-UI for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoj5-00069C-QF for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:32 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:63857) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoj5-0005xl-KO for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:31 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so292285pbb.4 for ; Sun, 09 Sep 2012 14:07:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=o9iTxgB1+VLyksJ4plbUBKPeoaE21+G3eCissu5BODc=; b=jFJ/iAuCUs8g/OSkBEN3TDStXtXGV5+RVY1vTXGsv9tvh/jQdASECgNbt9KkCG55br K0dKpvfA9h+1DB8bBbVavHZQmpOR+n3BBwRYwhn2Dz0vf6+3KdISsr6MBVNcr6NfURxw 04mibMYx9tVQ6TEznfnf6EwRLCRZp46E2W+w3++nQtMQg0jA3U6oUbe0BxVOzlHD54bS ibp9QYymWaqsAsxcMSW8k3M6B2oGpv4pJBmtZLxy/+gFcwzVFg1IZIbxjRH1QfmZbugX BA0u9zQvbsRgqx7jfHqKBVyKzb0DIsUIKD+g/oWzfYqsVPgZO9JaVJ2S+ZvZV8/fAdfp y3Ww== Received: by 10.68.229.228 with SMTP id st4mr2022658pbc.106.1347224851370; Sun, 09 Sep 2012 14:07:31 -0700 (PDT) Received: from anchor.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id tw5sm662053pbc.48.2012.09.09.14.07.30 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 09 Sep 2012 14:07:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 9 Sep 2012 14:05:25 -0700 Message-Id: <1347224784-19472-68-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.11.4 In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: Alexander Graf Subject: [Qemu-devel] [PATCH 067/126] target-s390: Convert STORE REVERSED X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 4 ++++ target-s390x/translate.c | 34 ++++++++++++++++++++++++---------- 2 files changed, 28 insertions(+), 10 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index f02e54c..11903bb 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -420,6 +420,10 @@ C(0xe370, STHY, RXY_a, LD, r1_o, a2, 0, 0, st16, 0) /* STORE HALFWORD RELATIVE LONG */ C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0) +/* STORE REVERSED */ + C(0xe33f, STRVH, RXY_a, Z, la2, r1_16u, new, m1_16, rev16, 0) + C(0xe33e, STRV, RXY_a, Z, la2, r1_32u, new, m1_32, rev32, 0) + C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0) /* STORE FPC */ C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 44975c0..92fb4c7 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1002,7 +1002,6 @@ static void free_compare(DisasCompare *c) static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2) { TCGv_i64 addr, tmp2; - TCGv_i32 tmp32_1; LOG_DISAS("disas_e3: op 0x%x r1 %d x2 %d b2 %d d2 %d\n", op, r1, x2, b2, d2); @@ -1015,15 +1014,6 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2) store_reg(r1, tmp2); tcg_temp_free_i64(tmp2); break; - case 0x3e: /* STRV R1,D2(X2,B2) [RXY] */ - tmp32_1 = load_reg32(r1); - tmp2 = tcg_temp_new_i64(); - tcg_gen_bswap32_i32(tmp32_1, tmp32_1); - tcg_gen_extu_i32_i64(tmp2, tmp32_1); - tcg_temp_free_i32(tmp32_1); - tcg_gen_qemu_st32(tmp2, addr, get_mem_index(s)); - tcg_temp_free_i64(tmp2); - break; default: LOG_DISAS("illegal e3 operation 0x%x\n", op); gen_illegal_opcode(s); @@ -3659,6 +3649,12 @@ static void in1_la1(DisasContext *s, DisasFields *f, DisasOps *o) o->addr1 = get_address(s, 0, get_field(f, b1), get_field(f, d1)); } +static void in1_la2(DisasContext *s, DisasFields *f, DisasOps *o) +{ + int x2 = have_field(f, x2) ? get_field(f, x2) : 0; + o->addr1 = get_address(s, x2, get_field(f, b2), get_field(f, d2)); +} + static void in1_m1_8u(DisasContext *s, DisasFields *f, DisasOps *o) { in1_la1(s, f, o); @@ -3704,6 +3700,24 @@ static void in1_m1_64(DisasContext *s, DisasFields *f, DisasOps *o) /* ====================================================================== */ /* The "INput 2" generators. These load the second operand to an insn. */ +static void in2_r1_o(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in2 = regs[get_field(f, r1)]; + o->g_in2 = true; +} + +static void in2_r1_16u(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in2 = tcg_temp_new_i64(); + tcg_gen_ext16u_i64(o->in2, regs[get_field(f, r1)]); +} + +static void in2_r1_32u(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in2 = tcg_temp_new_i64(); + tcg_gen_ext32u_i64(o->in2, regs[get_field(f, r1)]); +} + static void in2_r2(DisasContext *s, DisasFields *f, DisasOps *o) { o->in2 = load_reg(get_field(f, r2));