From patchwork Tue Aug 28 13:08:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleg Endo X-Patchwork-Id: 180482 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 70C6B2C0275 for ; Tue, 28 Aug 2012 23:09:18 +1000 (EST) Comment: DKIM? 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Tested with make all-gcc make info dvi pdf OK? Cheers, Oleg ChangeLog: * config/sh/sh.opt (menable-tas): Rename to mtas. * doc/invoke.texi (SH options): Likewise. * config/sh/sync.md: Update comments. Index: gcc/doc/invoke.texi =================================================================== --- gcc/doc/invoke.texi (revision 190723) +++ gcc/doc/invoke.texi (working copy) @@ -891,7 +891,7 @@ -maccumulate-outgoing-args -minvalid-symbols -msoft-atomic -mhard-atomic @gol -mbranch-cost=@var{num} -mzdcbranch -mno-zdcbranch -mcbranchdi -mcmpeqdi @gol -mfused-madd -mno-fused-madd -mfsca -mno-fsca -mfsrra -mno-fsrra @gol --mpretend-cmove -menable-tas} +-mpretend-cmove -mtas} @emph{Solaris 2 Options} @gccoptlist{-mimpure-text -mno-impure-text @gol @@ -18156,8 +18156,8 @@ @option{-msoft-atomic} option this will only use the instructions @code{movli.l} and @code{movco.l} to create atomic sequences. -@item -menable-tas -@opindex menable-tas +@item -mtas +@opindex mtas Generate the @code{tas.b} opcode for @code{__atomic_test_and_set}. Notice that depending on the particular hardware and software configuration this can degrade overall performance due to the operand cache line flushes Index: gcc/config/sh/sync.md =================================================================== --- gcc/config/sh/sync.md (revision 190723) +++ gcc/config/sh/sync.md (working copy) @@ -26,11 +26,11 @@ ;; In addition to that all SH CPUs support the 'tas.b' instruction, which ;; can be optionally used to implement the 'atomic_test_and_set' builtin. ;; -;; tas.b atomic_test_and_set (-menable-tas) +;; tas.b atomic_test_and_set (-mtas) ;; ;; Depending on the particular hardware configuration, usage of the 'tas.b' ;; instruction might be undesired or even unsafe. Thus, it has to be -;; enabled by the user explicitely. If it is not enabled, the +;; enabled by the user explicitly. If it is not enabled, the ;; 'atomic_test_and_set' builtin is implemented either with hardware or with ;; software atomics, depending on which is enabled. It is also possible to ;; enable the 'tas.b' instruction only, without enabling support for the Index: gcc/config/sh/sh.opt =================================================================== --- gcc/config/sh/sh.opt (revision 190723) +++ gcc/config/sh/sh.opt (working copy) @@ -327,7 +327,7 @@ Target Report Var(TARGET_HARD_ATOMIC) Use hardware atomic sequences -menable-tas +mtas Target Report RejectNegative Var(TARGET_ENABLE_TAS) Use tas.b instruction for __atomic_test_and_set