Patchwork [MIPS] Fix order of CVT.PS.S operands

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Submitter Richard Sandiford
Date Aug. 27, 2012, 8:53 a.m.
Message ID <8762843ed2.fsf@talisman.home>
Download mbox | patch
Permalink /patch/180158/
State New
Headers show

Comments

Richard Sandiford - Aug. 27, 2012, 8:53 a.m.
The FS input to CVT.PS.S is the high half and FT is the low half.
tcg_gen_concat_i32_i64 takes the low half first, so the operands
were in the wrong order.

Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
---
 target-mips/translate.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
Stefan Hajnoczi - Aug. 27, 2012, 9:07 a.m.
On Mon, Aug 27, 2012 at 9:53 AM, Richard Sandiford
<rdsandiford@googlemail.com> wrote:
> The FS input to CVT.PS.S is the high half and FT is the low half.
> tcg_gen_concat_i32_i64 takes the low half first, so the operands
> were in the wrong order.
>
> Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
> ---
>  target-mips/translate.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 06f0ac6..defc021 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -6907,7 +6907,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>
>              gen_load_fpr32(fp32_0, fs);
>              gen_load_fpr32(fp32_1, ft);
> -            tcg_gen_concat_i32_i64(fp64, fp32_0, fp32_1);
> +            tcg_gen_concat_i32_i64(fp64, fp32_1, fp32_0);
>              tcg_temp_free_i32(fp32_1);
>              tcg_temp_free_i32(fp32_0);
>              gen_store_fpr64(ctx, fp64, fd);
> --
> 1.7.7.6

CCing Aurelian for MIPS.  You can look at ./MAINTAINERS to see who
should be CCed.

Stefan
Aurelien Jarno - Aug. 27, 2012, 10:20 a.m.
On Mon, Aug 27, 2012 at 09:53:29AM +0100, Richard Sandiford wrote:
> The FS input to CVT.PS.S is the high half and FT is the low half.
> tcg_gen_concat_i32_i64 takes the low half first, so the operands
> were in the wrong order.
> 
> Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
> ---
>  target-mips/translate.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 06f0ac6..defc021 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -6907,7 +6907,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
>  
>              gen_load_fpr32(fp32_0, fs);
>              gen_load_fpr32(fp32_1, ft);
> -            tcg_gen_concat_i32_i64(fp64, fp32_0, fp32_1);
> +            tcg_gen_concat_i32_i64(fp64, fp32_1, fp32_0);
>              tcg_temp_free_i32(fp32_1);
>              tcg_temp_free_i32(fp32_0);
>              gen_store_fpr64(ctx, fp64, fd);

Thanks, applied.

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 06f0ac6..defc021 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -6907,7 +6907,7 @@  static void gen_farith (DisasContext *ctx, enum fopcode op1,
 
             gen_load_fpr32(fp32_0, fs);
             gen_load_fpr32(fp32_1, ft);
-            tcg_gen_concat_i32_i64(fp64, fp32_0, fp32_1);
+            tcg_gen_concat_i32_i64(fp64, fp32_1, fp32_0);
             tcg_temp_free_i32(fp32_1);
             tcg_temp_free_i32(fp32_0);
             gen_store_fpr64(ctx, fp64, fd);