Patchwork [U-Boot,0/3] Tegra 2 USB ULPI series

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Submitter Lucas Stach
Date Aug. 20, 2012, 7:59 p.m.
Message ID <1345492773.6188.5.camel@selen>
Download mbox | patch
Permalink /patch/178924/
State Not Applicable
Delegated to: Tom Warren
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Comments

Lucas Stach - Aug. 20, 2012, 7:59 p.m.
Am Montag, den 20.08.2012, 12:09 -0600 schrieb Stephen Warren:
> On 08/19/2012 10:08 AM, Lucas Stach wrote:
> > With this series we are able to initialize USB controllers
> > using an external ULPI phy AKA USB2 on Tegra 2 devices.
> > 
> > This was tested to work on a Toradex Colibri T20 board,
> > where USB2 is used to access the ASIX ethernet chipset.
> > Testing was done with "tegra20: usb: rework set_host_mode"
> > applied. I did not spot any regressions on the UTMI ports.
> > 
> > Patchset is based on top of u-boot-tegra/next
> 
> Hmmm. I tried testing this on my local branch on Harmony, which has all
> the patches necessary for multiple USB ports to work, and indeed they do
> on Seaboard. However, this series (plus some Harmony-specific config and
> .dts changes) didn't cause the ULPI port to work:-( Any idea why?
> 
Could you try the attached hack and report back? If it doesn't help
please build with DEBUG defined in
arch/arm/cpu/armv7/tegra20/usb.c
drivers/usb/host/ehci-hcd.c
and provide me the output of the usb start command.

Thanks,
Lucas
Stephen Warren - Aug. 22, 2012, 4:06 p.m.
On 08/20/2012 01:59 PM, Lucas Stach wrote:
> Am Montag, den 20.08.2012, 12:09 -0600 schrieb Stephen Warren:
>> On 08/19/2012 10:08 AM, Lucas Stach wrote:
>>> With this series we are able to initialize USB controllers
>>> using an external ULPI phy AKA USB2 on Tegra 2 devices.
>>>
>>> This was tested to work on a Toradex Colibri T20 board,
>>> where USB2 is used to access the ASIX ethernet chipset.
>>> Testing was done with "tegra20: usb: rework set_host_mode"
>>> applied. I did not spot any regressions on the UTMI ports.
>>>
>>> Patchset is based on top of u-boot-tegra/next
>>
>> Hmmm. I tried testing this on my local branch on Harmony, which has all
>> the patches necessary for multiple USB ports to work, and indeed they do
>> on Seaboard. However, this series (plus some Harmony-specific config and
>> .dts changes) didn't cause the ULPI port to work:-( Any idea why?
>>
> Could you try the attached hack and report back? If it doesn't help
> please build with DEBUG defined in
> arch/arm/cpu/armv7/tegra20/usb.c
> drivers/usb/host/ehci-hcd.c
> and provide me the output of the usb start command.

Oops. I had forgotten to enable ULPI/ULPI_VIEWPORT config options.

Now that I do that, U-Boot hangs when enabling the ULPI transceiver. I
see this with series v1, v1 plus the patch you included in the email I'm
replying to, and v2.

In particular, if I printf every line, the printf before the following
line appears, but not the one after it:

	setbits_le32(&usbctlr->susp_ctrl, ULPI_PHY_ENB);

If I comment that out, then the code runs farther, eventually hanging
inside ulpi_init(). Do you have any idea what's wrong?

Patch

diff --git a/arch/arm/cpu/armv7/tegra20/usb.c b/arch/arm/cpu/armv7/tegra20/usb.c
index 2ae1244..4c85685 100644
--- a/arch/arm/cpu/armv7/tegra20/usb.c
+++ b/arch/arm/cpu/armv7/tegra20/usb.c
@@ -367,7 +367,7 @@  static int init_ulpi_usb_controller(struct fdt_usb *config,
        }
 
        ulpi_write(&ulpi_vp, &ulpi_reg->iface_ctrl_set, ULPI_IFACE_PASSTHRU);
-       ulpi_write(&ulpi_vp, &ulpi_reg->otg_ctrl_set, ULPI_OTG_EXTVBUSIND);
+       ulpi_write(&ulpi_vp, &ulpi_reg->otg_ctrl_set, ULPI_OTG_DRVVBUS|ULPI_OTG_DRVVBUS_EXT|ULPI_OTG_EXTVBUSIND);
 
        /* enable wakeup events */
        setbits_le32(&usbctlr->port_sc1, WKCN | WKDS | WKOC);