Index: htdocs/gcc-4.8/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
retrieving revision 1.14
diff -u -r1.14 changes.html
--- htdocs/gcc-4.8/changes.html	19 Aug 2012 17:16:04 -0000	1.14
+++ htdocs/gcc-4.8/changes.html	19 Aug 2012 18:07:37 -0000
@@ -159,14 +159,14 @@
 
 <h3>SH</h3>
   <ul>
-    <li>The default alignment settings have been reduced to be less aggresive.
+    <li>The default alignment settings have been reduced to be less aggressive.
     This results in more compact code for optimization levels other than
     <code>-Os</code>.</li>
 
     <li>Improved support for the <code>__atomic</code> built-in functions:
     <ul>
-      <li>Minor tweaks for code around software atomic sequences that are
-      enabled by <code>-msoft-atomic</code>.</li>
+      <li>Minor improvements to code generated for software atomic sequences
+      that are enabled by <code>-msoft-atomic</code>.</li>
 
       <li>A new option <code>-menable-tas</code> will make the compiler
       generate the <code>tas.b</code> instruction for the
@@ -197,9 +197,10 @@
     <code>__builtin_prefetch</code> built-in function for SH3.</li>
 
     <li>The <code>fmac</code> instruction will now be emitted by the
-    <code>fmaf</code> standard and built-in function.</li>
+    <code>fmaf</code> standard function and the <code>__builtin_fmaf</code>
+    built-in function.</li>
 
-    <li>The <code>-mfused-madd</code> option has been depricated in favor of
+    <li>The <code>-mfused-madd</code> option has been deprecated in favor of
     the machine-independent <code>-ffp-contract</code> option.  Notice that the
     <code>fmac</code> instruction will now be generated by default for
     expressions like <code>a * b + c</code>.  This is due to the compiler
@@ -207,7 +208,8 @@
 
     <li>Added new options <code>-mfsrra</code> and <code>-mfsca</code> to allow
     the compiler using the <code>fsrra</code> and <code>fsca</code>
-    instructions on CPUs other than SH4A.</li>
+    instructions on CPUs other than SH4A (where they are already enabled by
+    default).</li>
 
     <li>Added support for the <code>__builtin_bswap32</code> built-in function.
     It is now expanded as a sequence of <code>swap.b</code> and