From patchwork Fri Aug 17 18:34:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 178330 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id D30912C009F for ; Sat, 18 Aug 2012 04:35:05 +1000 (EST) Comment: DKIM? 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See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:MIME-Version:Received:Received:In-Reply-To:References:Date:Message-ID:Subject:From:To:Cc:Content-Type:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=X2fr3JkEfRJ5C9ukq+Y7NK+JE6eJfjmvW2Q+Ma72vJSfMWGGk5N3bBYtRgh4zS R+fL1dgOlxwhnd3wpYCi9aHN7LAK3IP0x/hRz8uG4zKBLy9KMaTxZ3UgOXJiYeYA f9KpJ5CH9+Zm6/ime3CSfja8KgZek3rXnEr3NGABGTXe0=; Received: (qmail 16170 invoked by alias); 17 Aug 2012 18:34:57 -0000 Received: (qmail 15892 invoked by uid 22791); 17 Aug 2012 18:34:55 -0000 X-SWARE-Spam-Status: No, hits=-4.9 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, KHOP_RCVD_TRUST, KHOP_THREADED, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_YE, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-pz0-f47.google.com (HELO mail-pz0-f47.google.com) (209.85.210.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 17 Aug 2012 18:34:41 +0000 Received: by daks35 with SMTP id s35so952615dak.20 for ; Fri, 17 Aug 2012 11:34:41 -0700 (PDT) MIME-Version: 1.0 Received: by 10.68.236.102 with SMTP id ut6mr13572917pbc.113.1345228480863; Fri, 17 Aug 2012 11:34:40 -0700 (PDT) Received: by 10.66.251.227 with HTTP; Fri, 17 Aug 2012 11:34:40 -0700 (PDT) In-Reply-To: References: Date: Fri, 17 Aug 2012 20:34:40 +0200 Message-ID: Subject: Re: [PATCH, rtl-optimization]: Fix PR46829, ICE in spill_failure with -fschedule-insns [was: Fixing instability of -fschedule-insns for x86] From: Uros Bizjak To: gcc-patches@gcc.gnu.org Cc: Jakub Jelinek , Richard Guenther , Yuri Rumyantsev , Igor Zamyatin Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Fri, Aug 17, 2012 at 6:36 PM, Uros Bizjak wrote: > 2012-08-17 Uros Bizjak > > PR rtl-optimization/46829 > * combine.c (recog_for_combine): Check operand constraints > in case hard registers were propagater into insn pattern. > > testsuite/ChangeLog: > > 2012-08-17 Uros Bizjak > > PR rtl-optimization/46829 > * gcc.target/i386/pr46829.c: New test. > > Patch was bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32}. Oh ... This part: + && rtx_equal_p (recog_data.operand[j], + recog_data.operand[op_alt[j].matches])) should read: + && rtx_equal_p (recog_data.operand[i], + recog_data.operand[op_alt[j].matches])) Note the "j" vs "i" array index difference in the first line. Correct patch attached, bootstrapped and re-tested on x86_64-pc-linux-gnu {,-m32}. Uros. Index: combine.c =================================================================== --- combine.c (revision 190480) +++ combine.c (working copy) @@ -10507,6 +10507,7 @@ recog_for_combine (rtx *pnewpat, rtx insn, rtx *pn int i; rtx notes = 0; rtx old_notes, old_pat; + int old_icode; /* If PAT is a PARALLEL, check to see if it contains the CLOBBER we use to indicate that something didn't match. If we find such a @@ -10566,6 +10567,7 @@ recog_for_combine (rtx *pnewpat, rtx insn, rtx *pn print_rtl_single (dump_file, pat); } } + PATTERN (insn) = old_pat; REG_NOTES (insn) = old_notes; @@ -10607,6 +10609,86 @@ recog_for_combine (rtx *pnewpat, rtx insn, rtx *pn pat = newpat; } + old_pat = PATTERN (insn); + old_notes = REG_NOTES (insn); + old_icode = INSN_CODE (insn); + PATTERN (insn) = pat; + REG_NOTES (insn) = notes; + + /* Check operand constraints in case hard registers were propagated + into insn pattern. This check prevents combine pass from + generating insn patterns with invalid hard register operands. + These invalid insns can eventually confuse reload to error out + with a spill failure. See also PR 46829. */ + if (insn_code_number >= 0 + && insn_code_number != NOOP_MOVE_INSN_CODE + && (INSN_CODE (insn) = recog (PATTERN (insn), insn, 0)) >= 0) + { + extract_insn (insn); + preprocess_constraints (); + + for (i = 0; i < recog_data.n_operands; i++) + { + rtx op = recog_data.operand[i]; + enum machine_mode mode = GET_MODE (op); + struct operand_alternative *op_alt; + int offset = 0; + bool win; + int j; + + /* A unary operator may be accepted by the predicate, but it + is irrelevant for matching constraints. */ + if (UNARY_P (op)) + op = XEXP (op, 0); + + if (GET_CODE (op) == SUBREG) + { + if (REG_P (SUBREG_REG (op)) + && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER) + offset = subreg_regno_offset (REGNO (SUBREG_REG (op)), + GET_MODE (SUBREG_REG (op)), + SUBREG_BYTE (op), + GET_MODE (op)); + op = SUBREG_REG (op); + } + + if (!(REG_P (op) && HARD_REGISTER_P (op))) + continue; + + op_alt = recog_op_alt[i]; + + win = false; + for (j = 0; j < recog_data.n_alternatives; j++) + { + if (op_alt[j].anything_ok + || (op_alt[j].matches != -1 + && rtx_equal_p (recog_data.operand[i], + recog_data.operand[op_alt[j].matches])) + || (reg_fits_class_p (op, op_alt[j].cl, offset, mode))) + { + win = true; + break; + } + } + + if (!win) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fputs ("Operand failed to match constraints:\n", + dump_file); + print_rtl_single (dump_file, op); + } + insn_code_number = -1; + break; + } + } + } + + PATTERN (insn) = old_pat; + REG_NOTES (insn) = old_notes; + INSN_CODE (insn) = old_icode; + *pnewpat = pat; *pnotes = notes; Index: testsuite/gcc.target/i386/pr46829.c =================================================================== --- testsuite/gcc.target/i386/pr46829.c (revision 0) +++ testsuite/gcc.target/i386/pr46829.c (working copy) @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fschedule-insns" } */ + +struct S +{ + int i, j; +}; + +extern struct S s[]; + +extern void bar (int, ...); + +void +foo (int n) +{ + while (s[n].i) + bar (0, n, s[n].j, s, s[n].i / s[n].j); +}