From patchwork Fri Aug 17 05:11:56 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 178140 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B369C2C008B for ; Fri, 17 Aug 2012 15:17:00 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T2Eqr-0007Gx-AB; Fri, 17 Aug 2012 05:12:05 +0000 Received: from mail-pz0-f49.google.com ([209.85.210.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T2Eqo-0007Gj-5U for linux-arm-kernel@lists.infradead.org; Fri, 17 Aug 2012 05:12:02 +0000 Received: by dajq27 with SMTP id q27so728239daj.36 for ; Thu, 16 Aug 2012 22:12:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=eQnVCJ1erTqc/JYQ+uFkWq9J6p0Xv6N+6vhgEQ4FJlQ=; b=iD3k1j+nPgsKrBD32BiaDo+Fa0ktfjPIo9qbhptjQAbFz6vl1hpgF7+BhovIM7qHjh jMJWxvbLD9T5KkEJdK6EP2LEstMr7SkIXA8WWhkKZ67+U3FY1YI/nmIjcuGqL2qRwK+0 GAgSwhr4nDqWmZ7IzowpKvn6Nz17Mg0gHW80VAV/c9rRP4JTdgLFIN2Ula9bHVRtR5C0 8opfUWvkBOk1VBconddB6WmC5HoX7pziGj1kKC3gMay295vVRWw8BAjKeVfeB8WH90sQ urF+KY5kBdREvE0PEX/nrfEYklkT3SUZGRPFl3V0wjoji8BQ+wD9QSzzrfTtpQISKco2 avFg== Received: by 10.66.75.228 with SMTP id f4mr6902049paw.52.1345180320108; Thu, 16 Aug 2012 22:12:00 -0700 (PDT) Received: from localhost.localdomain ([221.225.141.189]) by mx.google.com with ESMTPS id b4sm3333152pbw.28.2012.08.16.22.11.57 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 16 Aug 2012 22:11:59 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: imx6q: remove imx_src_prepare_restart() call Date: Fri, 17 Aug 2012 13:11:56 +0800 Message-Id: <1345180316-9209-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.5.4 X-Gm-Message-State: ALoCoQnd2I6M0r7BxpBekWXHtf+5xuifO2ngfuh5+bEvdWi+v94Lax27Svr68EecYp9ok6aUfosU X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo , stable@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Currently, imx_src_prepare_restart which is called by imx6q_restart assumes that cpu0 must be the running cpu, so it disables all secondary cpus. However this is not the case, the restart routine could possibly running on cpu1 or any other secondary cores. In that case, disabling the cpu that runs restart routine will hang up system. Also it turns out that everything that is done by imx_src_prepare_restart is not really necessary, because the watchdog reset will have those registers reset properly. So let's remove the imx_src_prepare_restart call completely. Cc: Signed-off-by: Shawn Guo Tested-by: Dirk Behme --- arch/arm/mach-imx/mach-imx6q.c | 2 -- arch/arm/mach-imx/src.c | 13 ------------- arch/arm/plat-mxc/include/mach/common.h | 1 - 3 files changed, 0 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 5ec0608..d9b0614 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -48,8 +48,6 @@ void imx6q_restart(char mode, const char *cmd) if (!wdog_base) goto soft; - imx_src_prepare_restart(); - /* enable wdog */ writew_relaxed(1 << 2, wdog_base); /* write twice to ensure the request will not get ignored */ diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index e15f155..900b3c1 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c @@ -43,19 +43,6 @@ void imx_set_cpu_jump(int cpu, void *jump_addr) src_base + SRC_GPR1 + cpu * 8); } -void imx_src_prepare_restart(void) -{ - u32 val; - - /* clear enable bits of secondary cores */ - val = readl_relaxed(src_base + SRC_SCR); - val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE); - writel_relaxed(val, src_base + SRC_SCR); - - /* clear persistent entry register of primary core */ - writel_relaxed(0, src_base + SRC_GPR1); -} - void __init imx_src_init(void) { struct device_node *np; diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 7128e97..e94073f 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -133,7 +133,6 @@ static inline void imx_smp_prepare(void) {} extern void imx_enable_cpu(int cpu, bool enable); extern void imx_set_cpu_jump(int cpu, void *jump_addr); extern void imx_src_init(void); -extern void imx_src_prepare_restart(void); extern void imx_gpc_init(void); extern void imx_gpc_pre_suspend(void); extern void imx_gpc_post_resume(void);