From patchwork Wed Aug 15 13:48:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: seedshope X-Patchwork-Id: 177660 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B4E462C008B for ; Wed, 15 Aug 2012 23:51:31 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 51FF7281DA; Wed, 15 Aug 2012 15:50:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KMRQsuBIxqHs; Wed, 15 Aug 2012 15:50:36 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 915BE281C3; Wed, 15 Aug 2012 15:50:25 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0EC5B281B2 for ; Wed, 15 Aug 2012 15:50:14 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6VNx5DAW659R for ; Wed, 15 Aug 2012 15:50:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yw0-f44.google.com (mail-yw0-f44.google.com [209.85.213.44]) by theia.denx.de (Postfix) with ESMTPS id 7F01E2818D for ; Wed, 15 Aug 2012 15:49:53 +0200 (CEST) Received: by mail-yw0-f44.google.com with SMTP id 56so2059143yhq.3 for ; Wed, 15 Aug 2012 06:49:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=k6rOVY5T/Ji4WsSQdamvIC9pJrOD1FSV1ZnB1qwRU44=; b=VANLNScQHDnIkMEH0IRfM8KYV0eBm2q7nF6iP6vVq5DeUrv40oIznMew3r7APW8a3W IWGQygXzoc9YN5+pbFvMowKThnsJYzHpJe6SeyH53DZxw8WG6cUnm7pE+2JfnWiIA1aZ QhBhJ8TaarpK4vXtPAUqgTiNIEOqezJarC7396pbwd9pvUHhjuXm3QV9dbcAKgNZxFA5 wz6UFHLKWj0Y0M1iBGFbOzegB88TznXVzPVnK2Jfcqr3G7aRwkRQM1w2KDhLYqptFV7j yWyYOeWs5yQOO4FBUJE8HaU8Yf9CdZBvT0MGdU4HEgkexzwQtoC8eEXWBTImAnJ1RITa 5k1w== Received: by 10.68.239.164 with SMTP id vt4mr26615986pbc.118.1345038592803; Wed, 15 Aug 2012 06:49:52 -0700 (PDT) Received: from localhost.localdomain ([221.221.22.247]) by mx.google.com with ESMTPS id mu8sm593806pbc.49.2012.08.15.06.49.47 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 15 Aug 2012 06:49:51 -0700 (PDT) From: Zhong Hongbo To: Minkyu Kang Date: Wed, 15 Aug 2012 21:48:14 +0800 Message-Id: <1345038495-4020-14-git-send-email-bocui107@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1345038495-4020-1-git-send-email-bocui107@gmail.com> References: <1345038495-4020-1-git-send-email-bocui107@gmail.com> Cc: Scott Wood , u-boot@lists.denx.de Subject: [U-Boot] [PATCH 13/14] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V4: - None. Change for V3: - Replace ELFIN with S3C64XX for all the variable of cpu.h - Change __S3C6400_H__ into __CPU__H__ Change for V2: - New. --- arch/arm/cpu/arm1176/s3c64xx/pwm.c | 2 +- arch/arm/cpu/arm1176/s3c64xx/reset.c | 2 +- arch/arm/cpu/arm1176/s3c64xx/speed.c | 2 +- arch/arm/cpu/arm1176/s3c64xx/srom.c | 2 +- arch/arm/cpu/arm1176/s3c64xx/timer.c | 2 +- arch/arm/include/asm/arch-s3c64xx/cpu.h | 89 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 89 --------------------------- board/samsung/smdk6400/dmc_init.c | 2 +- board/samsung/smdk6400/lowlevel_init.S | 26 ++++---- board/samsung/smdk6400/smdk6400.c | 2 +- drivers/mtd/nand/s3c64xx.c | 2 +- drivers/serial/s3c64xx.c | 2 +- drivers/usb/host/s3c64xx-hcd.c | 2 +- 13 files changed, 112 insertions(+), 112 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c b/arch/arm/cpu/arm1176/s3c64xx/pwm.c index fff2c68..534901a 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include int pwm_enable(int pwm_id) diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.c b/arch/arm/cpu/arm1176/s3c64xx/reset.c index 773cffa..03cb306 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/reset.c +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include void reset_cpu(ulong addr) diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c index 05b44b9..5e68090 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/speed.c +++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c @@ -32,7 +32,7 @@ #include #include -#include +#include #include #define APLL 0 diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c b/arch/arm/cpu/arm1176/s3c64xx/srom.c index f1b2b34..92fb7af 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/srom.c +++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include /* * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the * band width control and bank control registers diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c index 47d7731..eebd0c0 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h b/arch/arm/include/asm/arch-s3c64xx/cpu.h new file mode 100644 index 0000000..90c5328 --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h @@ -0,0 +1,89 @@ +/* + * (C) Copyright 2007 + * Byungjae Lee, Samsung Erectronics, bjlee@samsung.com. + * - only support for S3C6400 + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************ + * NAME : cpu.h + * + * Based on S3C6400 User's manual Rev 0.0 + ************************************************/ + +#ifndef __CPU_H__ +#define __CPU_H__ + +#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400) +#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration! +#endif + +#define S3C64XX_UART_CHANNELS 3 +#define S3C64XX_SPI_CHANNELS 2 + +#include + +#define S3C64XX_CLOCK_POWER_BASE 0x7e00f000 +#define S3C64XX_GPIO_BASE 0x7f008000 +#define S3C64XX_MEM_SYS_CFG 0x7e00f120 +#define S3C64XX_SROM_BASE 0x70000000 +#define S3C64XX_DMC0_BASE 0x7e000000 +#define S3C64XX_DMC1_BASE 0x7e001000 +#define S3C64XX_NAND_BASE 0x70200000 +#define S3C64XX_VIC0_BASE 0x71200000 +#define S3C64XX_VIC1_BASE 0x71300000 +#define S3C64XX_WATCHDOG_BASE 0x7E004000 +#define S3C64XX_UART_BASE 0x7F005000 +#define S3C64XX_TIMER_BASE 0x7F006000 + +#ifndef __ASSEMBLY__ + +static inline unsigned long s3c64xx_get_base_uart(void) +{ + return S3C64XX_UART_BASE; +} + +static inline unsigned long s3c64xx_get_base_nand(void) +{ + return S3C64XX_NAND_BASE; +} + +static inline unsigned long s3c64xx_get_base_timer(void) +{ + return S3C64XX_TIMER_BASE; +} + +static inline unsigned long s3c64xx_get_base_sromc(void) +{ + return S3C64XX_SROM_BASE; +} + +static inline unsigned long s3c64xx_get_base_clock(void) +{ + return S3C64XX_CLOCK_POWER_BASE; +} + +static inline unsigned long s3c64xx_get_base_dmc1(void) +{ + return S3C64XX_DMC1_BASE; +} +#endif + +#endif /*__CPU_H__*/ diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h deleted file mode 100644 index 45a8918..0000000 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * (C) Copyright 2007 - * Byungjae Lee, Samsung Erectronics, bjlee@samsung.com. - * - only support for S3C6400 - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************ - * NAME : s3c6400.h - * - * Based on S3C6400 User's manual Rev 0.0 - ************************************************/ - -#ifndef __S3C6400_H__ -#define __S3C6400_H__ - -#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400) -#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration! -#endif - -#define S3C64XX_UART_CHANNELS 3 -#define S3C64XX_SPI_CHANNELS 2 - -#include - -#define ELFIN_CLOCK_POWER_BASE 0x7e00f000 -#define ELFIN_GPIO_BASE 0x7f008000 -#define ELFIN_MEM_SYS_CFG 0x7e00f120 -#define ELFIN_SROM_BASE 0x70000000 -#define ELFIN_DMC0_BASE 0x7e000000 -#define ELFIN_DMC1_BASE 0x7e001000 -#define ELFIN_NAND_BASE 0x70200000 -#define ELFIN_VIC0_BASE_ADDR 0x71200000 -#define ELFIN_VIC1_BASE_ADDR 0x71300000 -#define ELFIN_WATCHDOG_BASE 0x7E004000 -#define ELFIN_UART_BASE 0x7F005000 -#define ELFIN_TIMER_BASE 0x7F006000 - -#ifndef __ASSEMBLY__ - -static inline unsigned long s3c64xx_get_base_uart(void) -{ - return ELFIN_UART_BASE; -} - -static inline unsigned long s3c64xx_get_base_nand(void) -{ - return ELFIN_NAND_BASE; -} - -static inline unsigned long s3c64xx_get_base_timer(void) -{ - return ELFIN_TIMER_BASE; -} - -static inline unsigned long s3c64xx_get_base_sromc(void) -{ - return ELFIN_SROM_BASE; -} - -static inline unsigned long s3c64xx_get_base_clock(void) -{ - return ELFIN_CLOCK_POWER_BASE; -} - -static inline unsigned long s3c64xx_get_base_dmc1(void) -{ - return ELFIN_DMC1_BASE; -} -#endif - -#endif /*__S3C6400_H__*/ diff --git a/board/samsung/smdk6400/dmc_init.c b/board/samsung/smdk6400/dmc_init.c index 776536c..4d5deeb 100644 --- a/board/samsung/smdk6400/dmc_init.c +++ b/board/samsung/smdk6400/dmc_init.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include "setup.h" void memory_timing_parameter(struct s3c64xx_dmc *dmc) diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index e142217..92ad287 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -38,7 +38,7 @@ #include #include #include -#include +#include #include "setup.h" @@ -50,7 +50,7 @@ lowlevel_init: mov r12, lr /* LED on only #8 */ - ldr r0, =ELFIN_GPIO_BASE + ldr r0, =S3C64XX_GPIO_BASE ldr r1, =0x55540000 str r1, [r0, #GPNCON_OFFSET] @@ -67,12 +67,12 @@ lowlevel_init: str r1, [r0] /* External interrupt pending clear */ - ldr r0, =(ELFIN_GPIO_BASE + EINTPEND_OFFSET) /*EINTPEND*/ + ldr r0, =(S3C64XX_GPIO_BASE + EINTPEND_OFFSET) /*EINTPEND*/ ldr r1, [r0] str r1, [r0] - ldr r0, =ELFIN_VIC0_BASE_ADDR @0x71200000 - ldr r1, =ELFIN_VIC1_BASE_ADDR @0x71300000 + ldr r0, =S3C64XX_VIC0_BASE @0x71200000 + ldr r1, =S3C64XX_VIC1_BASE @0x71300000 /* Disable all interrupts (VIC0 and VIC1) */ mvn r3, #0x0 @@ -97,7 +97,7 @@ lowlevel_init: bl nand_asm_init /* Memory subsystem address 0x7e00f120 */ - ldr r0, =ELFIN_MEM_SYS_CFG + ldr r0, =S3C64XX_MEM_SYS_CFG /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */ mov r1, #S3C64XX_MEM_SYS_CFG_NAND @@ -112,7 +112,7 @@ lowlevel_init: #endif /* Wakeup support. Don't know if it's going to be used, untested. */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) + ldr r0, =(S3C64XX_CLOCK_POWER_BASE + RST_STAT_OFFSET) ldr r1, [r0] bic r1, r1, #0xfffffff7 cmp r1, #0x8 @@ -125,17 +125,17 @@ lowlevel_init: wakeup_reset: /* Clear wakeup status register */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) + ldr r0, =(S3C64XX_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) ldr r1, [r0] str r1, [r0] /* LED test */ - ldr r0, =ELFIN_GPIO_BASE + ldr r0, =S3C64XX_GPIO_BASE ldr r1, =0x3000 str r1, [r0, #GPNDAT_OFFSET] /* Load return address and jump to kernel */ - ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) + ldr r0, =(S3C64XX_CLOCK_POWER_BASE + INF_REG0_OFFSET) /* r1 = physical address of s3c6400_cpu_resume function */ ldr r1, [r0] /* Jump to kernel (sleep-s3c6400.S) */ @@ -147,7 +147,7 @@ wakeup_reset: * void system_clock_init(void) */ system_clock_init: - ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */ + ldr r0, =S3C64XX_CLOCK_POWER_BASE /* 0x7e00f000 */ #ifdef CONFIG_SYNC_MODE ldr r1, [r0, #OTHERS_OFFSET] @@ -255,7 +255,7 @@ wait_for_async: */ uart_asm_init: /* set GPIO to enable UART */ - ldr r0, =ELFIN_GPIO_BASE + ldr r0, =S3C64XX_GPIO_BASE ldr r1, =0x220022 str r1, [r0, #GPACON_OFFSET] mov pc, lr @@ -266,7 +266,7 @@ uart_asm_init: * NAND Interface init for SMDK6400 */ nand_asm_init: - ldr r0, =ELFIN_NAND_BASE + ldr r0, =S3C64XX_NAND_BASE ldr r1, [r0, #NFCONF_OFFSET] orr r1, r1, #0x70 orr r1, r1, #0x7700 diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c index be0e18b..3464b1f 100644 --- a/board/samsung/smdk6400/smdk6400.c +++ b/board/samsung/smdk6400/smdk6400.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c index b85b641..44a6d79 100644 --- a/drivers/mtd/nand/s3c64xx.c +++ b/drivers/mtd/nand/s3c64xx.c @@ -30,7 +30,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c index e411085..5559441 100644 --- a/drivers/serial/s3c64xx.c +++ b/drivers/serial/s3c64xx.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/usb/host/s3c64xx-hcd.c b/drivers/usb/host/s3c64xx-hcd.c index 74b5951..c193e81 100644 --- a/drivers/usb/host/s3c64xx-hcd.c +++ b/drivers/usb/host/s3c64xx-hcd.c @@ -26,7 +26,7 @@ #include #include -#include +#include #include int usb_cpu_init(void)