Patchwork [U-Boot,13/14] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board

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Submitter seedshope
Date Aug. 15, 2012, 1:48 p.m.
Message ID <1345038495-4020-14-git-send-email-bocui107@gmail.com>
Download mbox | patch
Permalink /patch/177660/
State Changes Requested
Delegated to: Minkyu Kang
Headers show

Comments

seedshope - Aug. 15, 2012, 1:48 p.m.
From: Zhong Hongbo <bocui107@gmail.com>

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
---
Change for V4:
	- None.
Change for V3:
	- Replace ELFIN with S3C64XX for all the variable of cpu.h
	- Change __S3C6400_H__ into __CPU__H__
Change for V2:
	- New.
---
 arch/arm/cpu/arm1176/s3c64xx/pwm.c          |    2 +-
 arch/arm/cpu/arm1176/s3c64xx/reset.c        |    2 +-
 arch/arm/cpu/arm1176/s3c64xx/speed.c        |    2 +-
 arch/arm/cpu/arm1176/s3c64xx/srom.c         |    2 +-
 arch/arm/cpu/arm1176/s3c64xx/timer.c        |    2 +-
 arch/arm/include/asm/arch-s3c64xx/cpu.h     |   89 +++++++++++++++++++++++++++
 arch/arm/include/asm/arch-s3c64xx/s3c6400.h |   89 ---------------------------
 board/samsung/smdk6400/dmc_init.c           |    2 +-
 board/samsung/smdk6400/lowlevel_init.S      |   26 ++++----
 board/samsung/smdk6400/smdk6400.c           |    2 +-
 drivers/mtd/nand/s3c64xx.c                  |    2 +-
 drivers/serial/s3c64xx.c                    |    2 +-
 drivers/usb/host/s3c64xx-hcd.c              |    2 +-
 13 files changed, 112 insertions(+), 112 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h
 delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h

Patch

diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
index fff2c68..534901a 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
@@ -27,7 +27,7 @@ 
 #include <errno.h>
 #include <pwm.h>
 #include <asm/io.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/pwm.h>
 
 int pwm_enable(int pwm_id)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.c b/arch/arm/cpu/arm1176/s3c64xx/reset.c
index 773cffa..03cb306 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.c
@@ -23,7 +23,7 @@ 
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/clock.h>
 
 void reset_cpu(ulong addr)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c
index 05b44b9..5e68090 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
@@ -32,7 +32,7 @@ 
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/clock.h>
 
 #define APLL 0
diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c b/arch/arm/cpu/arm1176/s3c64xx/srom.c
index f1b2b34..92fb7af 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/srom.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c
@@ -25,7 +25,7 @@ 
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/sromc.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 /*
  * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the
  * band width control and bank control registers
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c
index 47d7731..eebd0c0 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
@@ -25,7 +25,7 @@ 
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/pwm.h>
 #include <pwm.h>
 
diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h b/arch/arm/include/asm/arch-s3c64xx/cpu.h
new file mode 100644
index 0000000..90c5328
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h
@@ -0,0 +1,89 @@ 
+/*
+ * (C) Copyright 2007
+ * Byungjae Lee, Samsung Erectronics, bjlee@samsung.com.
+ *      - only support for S3C6400
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************
+ * NAME	    : cpu.h
+ *
+ * Based on S3C6400 User's manual Rev 0.0
+ ************************************************/
+
+#ifndef __CPU_H__
+#define __CPU_H__
+
+#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
+#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
+#endif
+
+#define S3C64XX_UART_CHANNELS	3
+#define S3C64XX_SPI_CHANNELS	2
+
+#include <asm/hardware.h>
+
+#define S3C64XX_CLOCK_POWER_BASE	0x7e00f000
+#define S3C64XX_GPIO_BASE		0x7f008000
+#define S3C64XX_MEM_SYS_CFG		0x7e00f120
+#define S3C64XX_SROM_BASE		0x70000000
+#define S3C64XX_DMC0_BASE		0x7e000000
+#define S3C64XX_DMC1_BASE		0x7e001000
+#define S3C64XX_NAND_BASE		0x70200000
+#define S3C64XX_VIC0_BASE		0x71200000
+#define S3C64XX_VIC1_BASE		0x71300000
+#define S3C64XX_WATCHDOG_BASE		0x7E004000
+#define S3C64XX_UART_BASE		0x7F005000
+#define S3C64XX_TIMER_BASE		0x7F006000
+
+#ifndef __ASSEMBLY__
+
+static inline unsigned long s3c64xx_get_base_uart(void)
+{
+	return S3C64XX_UART_BASE;
+}
+
+static inline unsigned long s3c64xx_get_base_nand(void)
+{
+	return S3C64XX_NAND_BASE;
+}
+
+static inline unsigned long s3c64xx_get_base_timer(void)
+{
+	return S3C64XX_TIMER_BASE;
+}
+
+static inline unsigned long s3c64xx_get_base_sromc(void)
+{
+	return S3C64XX_SROM_BASE;
+}
+
+static inline unsigned long s3c64xx_get_base_clock(void)
+{
+	return S3C64XX_CLOCK_POWER_BASE;
+}
+
+static inline unsigned long s3c64xx_get_base_dmc1(void)
+{
+	return S3C64XX_DMC1_BASE;
+}
+#endif
+
+#endif /*__CPU_H__*/
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
deleted file mode 100644
index 45a8918..0000000
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ /dev/null
@@ -1,89 +0,0 @@ 
-/*
- * (C) Copyright 2007
- * Byungjae Lee, Samsung Erectronics, bjlee@samsung.com.
- *      - only support for S3C6400
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/************************************************
- * NAME	    : s3c6400.h
- *
- * Based on S3C6400 User's manual Rev 0.0
- ************************************************/
-
-#ifndef __S3C6400_H__
-#define __S3C6400_H__
-
-#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
-#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
-#endif
-
-#define S3C64XX_UART_CHANNELS	3
-#define S3C64XX_SPI_CHANNELS	2
-
-#include <asm/hardware.h>
-
-#define ELFIN_CLOCK_POWER_BASE	0x7e00f000
-#define ELFIN_GPIO_BASE		0x7f008000
-#define ELFIN_MEM_SYS_CFG	0x7e00f120
-#define ELFIN_SROM_BASE		0x70000000
-#define ELFIN_DMC0_BASE		0x7e000000
-#define ELFIN_DMC1_BASE		0x7e001000
-#define ELFIN_NAND_BASE		0x70200000
-#define ELFIN_VIC0_BASE_ADDR	0x71200000
-#define ELFIN_VIC1_BASE_ADDR	0x71300000
-#define ELFIN_WATCHDOG_BASE	0x7E004000
-#define ELFIN_UART_BASE		0x7F005000
-#define ELFIN_TIMER_BASE	0x7F006000
-
-#ifndef __ASSEMBLY__
-
-static inline unsigned long s3c64xx_get_base_uart(void)
-{
-	return ELFIN_UART_BASE;
-}
-
-static inline unsigned long s3c64xx_get_base_nand(void)
-{
-	return ELFIN_NAND_BASE;
-}
-
-static inline unsigned long s3c64xx_get_base_timer(void)
-{
-	return ELFIN_TIMER_BASE;
-}
-
-static inline unsigned long s3c64xx_get_base_sromc(void)
-{
-	return ELFIN_SROM_BASE;
-}
-
-static inline unsigned long s3c64xx_get_base_clock(void)
-{
-	return ELFIN_CLOCK_POWER_BASE;
-}
-
-static inline unsigned long s3c64xx_get_base_dmc1(void)
-{
-	return ELFIN_DMC1_BASE;
-}
-#endif
-
-#endif /*__S3C6400_H__*/
diff --git a/board/samsung/smdk6400/dmc_init.c b/board/samsung/smdk6400/dmc_init.c
index 776536c..4d5deeb 100644
--- a/board/samsung/smdk6400/dmc_init.c
+++ b/board/samsung/smdk6400/dmc_init.c
@@ -24,7 +24,7 @@ 
 #include <config.h>
 #include <asm/io.h>
 #include <asm/arch/dmc.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include "setup.h"
 
 void memory_timing_parameter(struct s3c64xx_dmc *dmc)
diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S
index e142217..92ad287 100644
--- a/board/samsung/smdk6400/lowlevel_init.S
+++ b/board/samsung/smdk6400/lowlevel_init.S
@@ -38,7 +38,7 @@ 
 #include <asm/arch/clock.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/interrupt.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 
 #include "setup.h"
 
@@ -50,7 +50,7 @@  lowlevel_init:
 	mov	r12, lr
 
 	/* LED on only #8 */
-	ldr	r0, =ELFIN_GPIO_BASE
+	ldr	r0, =S3C64XX_GPIO_BASE
 	ldr	r1, =0x55540000
 	str	r1, [r0, #GPNCON_OFFSET]
 
@@ -67,12 +67,12 @@  lowlevel_init:
 	str	r1, [r0]
 
 	/* External interrupt pending clear */
-	ldr	r0, =(ELFIN_GPIO_BASE + EINTPEND_OFFSET)  /*EINTPEND*/
+	ldr	r0, =(S3C64XX_GPIO_BASE + EINTPEND_OFFSET)  /*EINTPEND*/
 	ldr	r1, [r0]
 	str	r1, [r0]
 
-	ldr	r0, =ELFIN_VIC0_BASE_ADDR	@0x71200000
-	ldr	r1, =ELFIN_VIC1_BASE_ADDR	@0x71300000
+	ldr	r0, =S3C64XX_VIC0_BASE	@0x71200000
+	ldr	r1, =S3C64XX_VIC1_BASE	@0x71300000
 
 	/* Disable all interrupts (VIC0 and VIC1) */
 	mvn	r3, #0x0
@@ -97,7 +97,7 @@  lowlevel_init:
 	bl	nand_asm_init
 
 	/* Memory subsystem address 0x7e00f120 */
-	ldr	r0, =ELFIN_MEM_SYS_CFG
+	ldr	r0, =S3C64XX_MEM_SYS_CFG
 
 	/* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
 	mov	r1, #S3C64XX_MEM_SYS_CFG_NAND
@@ -112,7 +112,7 @@  lowlevel_init:
 #endif
 
 /* Wakeup support. Don't know if it's going to be used, untested. */
-	ldr	r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET)
+	ldr	r0, =(S3C64XX_CLOCK_POWER_BASE + RST_STAT_OFFSET)
 	ldr	r1, [r0]
 	bic	r1, r1, #0xfffffff7
 	cmp	r1, #0x8
@@ -125,17 +125,17 @@  lowlevel_init:
 wakeup_reset:
 
 	/* Clear wakeup status register */
-	ldr	r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET)
+	ldr	r0, =(S3C64XX_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET)
 	ldr	r1, [r0]
 	str	r1, [r0]
 
 	/* LED test */
-	ldr	r0, =ELFIN_GPIO_BASE
+	ldr	r0, =S3C64XX_GPIO_BASE
 	ldr	r1, =0x3000
 	str	r1, [r0, #GPNDAT_OFFSET]
 
 	/* Load return address and jump to kernel */
-	ldr	r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET)
+	ldr	r0, =(S3C64XX_CLOCK_POWER_BASE + INF_REG0_OFFSET)
 	/* r1 = physical address of s3c6400_cpu_resume function */
 	ldr	r1, [r0]
 	/* Jump to kernel (sleep-s3c6400.S) */
@@ -147,7 +147,7 @@  wakeup_reset:
  * void system_clock_init(void)
  */
 system_clock_init:
-	ldr	r0, =ELFIN_CLOCK_POWER_BASE	/* 0x7e00f000 */
+	ldr	r0, =S3C64XX_CLOCK_POWER_BASE	/* 0x7e00f000 */
 
 #ifdef CONFIG_SYNC_MODE
 	ldr	r1, [r0, #OTHERS_OFFSET]
@@ -255,7 +255,7 @@  wait_for_async:
  */
 uart_asm_init:
 	/* set GPIO to enable UART */
-	ldr	r0, =ELFIN_GPIO_BASE
+	ldr	r0, =S3C64XX_GPIO_BASE
 	ldr	r1, =0x220022
 	str	r1, [r0, #GPACON_OFFSET]
 	mov	pc, lr
@@ -266,7 +266,7 @@  uart_asm_init:
  * NAND Interface init for SMDK6400
  */
 nand_asm_init:
-	ldr	r0, =ELFIN_NAND_BASE
+	ldr	r0, =S3C64XX_NAND_BASE
 	ldr	r1, [r0, #NFCONF_OFFSET]
 	orr	r1, r1, #0x70
 	orr	r1, r1, #0x7700
diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c
index be0e18b..3464b1f 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -31,7 +31,7 @@ 
 #include <common.h>
 #include <netdev.h>
 #include <asm/arch/sromc.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
index b85b641..44a6d79 100644
--- a/drivers/mtd/nand/s3c64xx.c
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -30,7 +30,7 @@ 
 #include <nand.h>
 #include <linux/mtd/nand.h>
 
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/nand.h>
 
 #include <asm/io.h>
diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c
index e411085..5559441 100644
--- a/drivers/serial/s3c64xx.c
+++ b/drivers/serial/s3c64xx.c
@@ -23,7 +23,7 @@ 
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/usb/host/s3c64xx-hcd.c b/drivers/usb/host/s3c64xx-hcd.c
index 74b5951..c193e81 100644
--- a/drivers/usb/host/s3c64xx-hcd.c
+++ b/drivers/usb/host/s3c64xx-hcd.c
@@ -26,7 +26,7 @@ 
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/s3c6400.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/clock.h>
 
 int usb_cpu_init(void)