From patchwork Tue Aug 14 11:42:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 177232 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5A6DF2C0082 for ; Tue, 14 Aug 2012 21:43:26 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CA0742810F; Tue, 14 Aug 2012 13:43:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zAnvmtPC81af; Tue, 14 Aug 2012 13:43:22 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9F80B28110; Tue, 14 Aug 2012 13:43:16 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C87F4280AA for ; Tue, 14 Aug 2012 13:43:11 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 77x0NiCkunmr for ; Tue, 14 Aug 2012 13:43:10 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wg0-f52.google.com (mail-wg0-f52.google.com [74.125.82.52]) by theia.denx.de (Postfix) with ESMTPS id 51EAC28071 for ; Tue, 14 Aug 2012 13:43:01 +0200 (CEST) Received: by wgbfg15 with SMTP id fg15so248570wgb.9 for ; Tue, 14 Aug 2012 04:43:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=aCCKfR5uH4z1Y+Am9mVkuJw2Bf617q8vhK9rhxH2f5Y=; b=g33dD4Uq3OtP+JVXVbjwU8WiHR7yZYk37vkK3hdCdaFUCKfAk/zLyAcb9Un+ps5Ruv jCxxx2mPzbrbKWnHFffDXdQS0QCho9g1oO/FFvA+mF/eDeWtLd2Nt5YxZNaVkx+FZVri AHtzvahAudiCRVkJF319kmsm/IFGVe0V6E1t8ubD8XnsGffrwSjW00ECq1lnvJ2XKpzH GMs4KiK74WiuDYUXyw3PrbmWtZHwKJe5CWQucgniSKFT2szpJivihpwFZBO28qyB70vs jOj9G3mJ8til74HceGYoGgWE2iJ+OXWSDhcW7K6pxUMApnO+KNjEMgzDJB0l9aPmMpxF aIIg== Received: by 10.216.162.141 with SMTP id y13mr8219416wek.14.1344944580990; Tue, 14 Aug 2012 04:43:00 -0700 (PDT) Received: from localhost (nat-2.starnet.cz. [92.62.224.2]) by mx.google.com with ESMTPS id w7sm21959475wiz.0.2012.08.14.04.43.00 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 14 Aug 2012 04:43:00 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de Date: Tue, 14 Aug 2012 13:42:46 +0200 Message-Id: <1344944567-1694-4-git-send-email-monstr@monstr.eu> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1344944567-1694-1-git-send-email-monstr@monstr.eu> References: <1344944567-1694-1-git-send-email-monstr@monstr.eu> X-Gm-Message-State: ALoCoQlM6m4fsfogk+N4UadY1PFtHAZsJ0C3oQW6dxPCrxNftCvrwEDKiWr0XIwTXVXicU142lcV Cc: John Linn , John Williams Subject: [U-Boot] [PATCH 3/4] arm: Support new Xilinx Zynq platform X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add timer driver. Signed-off-by: Michal Simek --- arch/arm/cpu/armv7/zynq/Makefile | 48 ++++++++++++ arch/arm/cpu/armv7/zynq/timer.c | 151 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 199 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/zynq/Makefile create mode 100644 arch/arm/cpu/armv7/zynq/timer.c diff --git a/arch/arm/cpu/armv7/zynq/Makefile b/arch/arm/cpu/armv7/zynq/Makefile new file mode 100644 index 0000000..814c1d4 --- /dev/null +++ b/arch/arm/cpu/armv7/zynq/Makefile @@ -0,0 +1,48 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +COBJS = timer.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c new file mode 100644 index 0000000..d79da97 --- /dev/null +++ b/arch/arm/cpu/armv7/zynq/timer.c @@ -0,0 +1,151 @@ +/* + * Copyright (C) 2012 Michal Simek + * Copyright (C) 2011-2012 Xilinx, Inc. All rights reserved. + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, + * + * (C) Copyright 2004 + * Philippe Robin, ARM Ltd. + * + * (C) Copyright 2002-2004 + * Gary Jennejohn, DENX Software Engineering, + * + * (C) Copyright 2003 + * Texas Instruments + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Marius Groeger + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Alex Zuepke + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +struct scu_timer { + u32 load; /* Timer Load Register */ + u32 counter; /* Timer Counter Register */ + u32 control; /* Timer Control Register */ +}; + +static struct scu_timer *timer_base = CONFIG_XPSS_SCUTIMER_BASEADDR; + +#define XSCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */ +#define XSCUTIMER_CONTROL_PRESCALER_SHIFT 8 +#define XSCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */ +#define XSCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */ + +#define TIMER_LOAD_VAL 0xFFFFFFFF +#define TIMER_PRESCALE 255 +#define TIMER_TICK_HZ (CONFIG_CPU_FREQ_HZ / 2 / TIMER_PRESCALE) + +int timer_init(void) +{ + u32 val; + + /* Load the timer counter register */ + writel(0xFFFFFFFF, &timer_base->counter); + + /* Start the A9Timer device */ + val = readl(&timer_base->control); + /* Enable Auto reload mode */ + val |= XSCUTIMER_CONTROL_AUTO_RELOAD_MASK; + /* Clear prescaler control bits */ + val &= ~XSCUTIMER_CONTROL_PRESCALER_MASK; + /* Set prescaler value */ + val |= (TIMER_PRESCALE << XSCUTIMER_CONTROL_PRESCALER_SHIFT); + /* Enable the decrementer */ + val |= XSCUTIMER_CONTROL_ENABLE_MASK; + writel(val, &timer_base->control); + + /* Reset time */ + gd->lastinc = readl(&timer_base->counter) / + (TIMER_TICK_HZ / CONFIG_SYS_HZ); + gd->tbl = 0; + + return 0; +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +ulong get_timer_masked(void) +{ + ulong now; + + now = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ); + + if (gd->lastinc >= now) { + /* Normal mode */ + gd->tbl += gd->lastinc - now; + } else { + /* We have an overflow ... */ + gd->tbl += gd->lastinc + TIMER_LOAD_VAL - now; + } + gd->lastinc = now; + + return gd->tbl; +} + +void __udelay(unsigned long usec) +{ + unsigned long long tmp; + ulong tmo; + + tmo = usec / (1000000 / CONFIG_SYS_HZ); + tmp = get_ticks() + tmo; /* Get current timestamp */ + + while (get_ticks() < tmp) { /* Loop till event */ + /* NOP */; + } +} + +/* Timer without interrupts */ +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +}