Patchwork [U-Boot,05/13] spl mxc nand: Set symmetric mode

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Submitter Benoît Thébaudeau
Date Aug. 13, 2012, 8:49 p.m.
Message ID <461090133.2374988.1344890971188.JavaMail.root@advansee.com>
Download mbox | patch
Permalink /patch/177089/
State Accepted
Commit 0e55ad7271259b1de183fb5329ea7f07774e368d
Delegated to: Scott Wood
Headers show

Comments

Benoît Thébaudeau - Aug. 13, 2012, 8:49 p.m.
Set the spl mxc nand driver for IP 1.1 in symmetric mode, like the mtd driver.
In this way, for both drivers, one input clock period of the NFC IP will produce
one R/W cycle.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 .../nand_spl/nand_boot_fsl_nfc.c                   |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Patch

diff --git u-boot-4d3c95f.orig/nand_spl/nand_boot_fsl_nfc.c u-boot-4d3c95f/nand_spl/nand_boot_fsl_nfc.c
index 059969b..842943c 100644
--- u-boot-4d3c95f.orig/nand_spl/nand_boot_fsl_nfc.c
+++ u-boot-4d3c95f/nand_spl/nand_boot_fsl_nfc.c
@@ -57,7 +57,8 @@  static void nfc_nand_init(void)
 	writew(0x2, &nfc->config);
 
 	/* hardware ECC checking and correct */
-	config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK | NFC_FP_INT;
+	config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK |
+			NFC_ONE_CYCLE | NFC_FP_INT;
 	/*
 	 * if spare size is larger that 16 bytes per 512 byte hunk
 	 * then use 8 symbol correction instead of 4