Patchwork [U-Boot,02/13] mxc nand: cosmectic: Light cleanup

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Submitter Benoît Thébaudeau
Date Aug. 13, 2012, 8:48 p.m.
Message ID <1249369398.2374984.1344890906091.JavaMail.root@advansee.com>
Download mbox | patch
Permalink /patch/177086/
State Accepted
Commit 365b2c0761040764953e659f3385840e33823807
Delegated to: Scott Wood
Headers show

Comments

Benoît Thébaudeau - Aug. 13, 2012, 8:48 p.m.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 .../drivers/mtd/nand/mxc_nand.c                    |    9 +++------
 .../include/fsl_nfc.h                              |    1 +
 .../nand_spl/nand_boot_fsl_nfc.c                   |   14 +++++++-------
 3 files changed, 11 insertions(+), 13 deletions(-)
Stefano Babic - Aug. 14, 2012, 8:41 a.m.
On 13/08/2012 22:48, Benoît Thébaudeau wrote:
> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
> Cc: Scott Wood <scottwood@freescale.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  .../drivers/mtd/nand/mxc_nand.c                    |    9 +++------
>  .../include/fsl_nfc.h                              |    1 +
>  .../nand_spl/nand_boot_fsl_nfc.c                   |   14 +++++++-------
>  3 files changed, 11 insertions(+), 13 deletions(-)
> 
> diff --git u-boot-4d3c95f.orig/drivers/mtd/nand/mxc_nand.c u-boot-4d3c95f/drivers/mtd/nand/mxc_nand.c
> index 9a9260c..62d8c6b 100644
> --- u-boot-4d3c95f.orig/drivers/mtd/nand/mxc_nand.c
> +++ u-boot-4d3c95f/drivers/mtd/nand/mxc_nand.c
> @@ -123,8 +123,7 @@ static int is_16bit_nand(void)
>  #elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
>  static int is_16bit_nand(void)
>  {
> -	struct ccm_regs *ccm =
> -		(struct ccm_regs *)IMX_CCM_BASE;
> +	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
>  
>  	if (readl(&ccm->rcsr) & CCM_RCSR_NF_16BIT_SEL)
>  		return 1;
> @@ -238,7 +237,7 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
>  		if (spare_only)
>  			config1 |= NFC_SP_EN;
>  		else
> -			config1 &= ~(NFC_SP_EN);
> +			config1 &= ~NFC_SP_EN;
>  		writew(config1, &host->regs->config1);
>  	}
>  
> @@ -687,7 +686,6 @@ static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
>  #define mxc_nand_write_page_syndrome NULL
>  #define mxc_nand_write_page_raw_syndrome NULL
>  #define mxc_nand_write_oob_syndrome NULL
> -#define mxc_nfc_11_nand_correct_data NULL
>  
>  static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
>  				 u_char *read_ecc, u_char *calc_ecc)
> @@ -1188,7 +1186,6 @@ int board_nand_init(struct nand_chip *this)
>  {
>  	struct mtd_info *mtd;
>  	uint16_t tmp;
> -	int err = 0;
>  
>  #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
>  	this->options |= NAND_USE_FLASH_BBT;
> @@ -1287,5 +1284,5 @@ int board_nand_init(struct nand_chip *this)
>  	this->ecc.layout = &nand_hw_eccoob;
>  #endif
>  	mxc_setup_config1();
> -	return err;
> +	return 0;
>  }
> diff --git u-boot-4d3c95f.orig/include/fsl_nfc.h u-boot-4d3c95f/include/fsl_nfc.h
> index 6691e41..1c16c71 100644
> --- u-boot-4d3c95f.orig/include/fsl_nfc.h
> +++ u-boot-4d3c95f/include/fsl_nfc.h
> @@ -166,5 +166,6 @@ struct fsl_nfc_regs {
>  #define NFC_RST		(1 << 6)
>  #define NFC_CE		(1 << 7)
>  #define NFC_ONE_CYCLE	(1 << 8)
> +#define NFC_FP_INT	(1 << 11)
>  
>  #endif /* __FSL_NFC_H */
> diff --git u-boot-4d3c95f.orig/nand_spl/nand_boot_fsl_nfc.c u-boot-4d3c95f/nand_spl/nand_boot_fsl_nfc.c
> index f437deb..b90f93e 100644
> --- u-boot-4d3c95f.orig/nand_spl/nand_boot_fsl_nfc.c
> +++ u-boot-4d3c95f/nand_spl/nand_boot_fsl_nfc.c
> @@ -45,10 +45,10 @@ static void nfc_wait_ready(void)
>  	writew(tmp, &nfc->config2);
>  }
>  
> -void nfc_nand_init(void)
> +static void nfc_nand_init(void)
>  {
>  #if defined(MXC_NFC_V1_1)
> -	int ecc_per_page  = CONFIG_SYS_NAND_PAGE_SIZE / 512;
> +	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
>  	int config1;
>  
>  	writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
> @@ -57,12 +57,12 @@ void nfc_nand_init(void)
>  	writew(0x2, &nfc->config);
>  
>  	/* hardware ECC checking and correct */
> -	config1 = readw(&nfc->config1) | NFC_ECC_EN | 0x800;
> +	config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_FP_INT;
>  	/*
>  	 * if spare size is larger that 16 bytes per 512 byte hunk
>  	 * then use 8 symbol correction instead of 4
>  	 */
> -	if ((CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page) > 16)
> +	if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
>  		config1 &= ~NFC_4_8N_ECC;
>  	else
>  		config1 |= NFC_4_8N_ECC;
> @@ -133,7 +133,7 @@ static void nfc_nand_data_output(void)
>  	 * This NAND controller requires multiple input commands
>  	 * for pages larger than 512 bytes.
>  	 */
> -	for (i = 1; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
> +	for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
>  		config1 = readw(&nfc->config1);
>  		config1 |= NFC_ECC_EN | NFC_INT_MSK;
>  		writew(config1, &nfc->config1);
> @@ -171,7 +171,7 @@ static int nfc_read_page(unsigned int page_address, unsigned char *buf)
>  	dst = (u32 *)buf;
>  
>  	/* main copy loop from NAND-buffer to SDRAM memory */
> -	for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
> +	for (i = 0; i < CONFIG_SYS_NAND_PAGE_SIZE / 4; i++) {
>  		writel(readl(src), dst);
>  		src++;
>  		dst++;
> @@ -230,7 +230,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
>  	page = from / CONFIG_SYS_NAND_PAGE_SIZE;
>  	i = 0;
>  
> -	while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
> +	while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
>  		if (nfc_read_page(page, buf) < 0)
>  			return -1;
>  
> 

Aceked-by : Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

Patch

diff --git u-boot-4d3c95f.orig/drivers/mtd/nand/mxc_nand.c u-boot-4d3c95f/drivers/mtd/nand/mxc_nand.c
index 9a9260c..62d8c6b 100644
--- u-boot-4d3c95f.orig/drivers/mtd/nand/mxc_nand.c
+++ u-boot-4d3c95f/drivers/mtd/nand/mxc_nand.c
@@ -123,8 +123,7 @@  static int is_16bit_nand(void)
 #elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
 static int is_16bit_nand(void)
 {
-	struct ccm_regs *ccm =
-		(struct ccm_regs *)IMX_CCM_BASE;
+	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
 
 	if (readl(&ccm->rcsr) & CCM_RCSR_NF_16BIT_SEL)
 		return 1;
@@ -238,7 +237,7 @@  static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
 		if (spare_only)
 			config1 |= NFC_SP_EN;
 		else
-			config1 &= ~(NFC_SP_EN);
+			config1 &= ~NFC_SP_EN;
 		writew(config1, &host->regs->config1);
 	}
 
@@ -687,7 +686,6 @@  static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
 #define mxc_nand_write_page_syndrome NULL
 #define mxc_nand_write_page_raw_syndrome NULL
 #define mxc_nand_write_oob_syndrome NULL
-#define mxc_nfc_11_nand_correct_data NULL
 
 static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
 				 u_char *read_ecc, u_char *calc_ecc)
@@ -1188,7 +1186,6 @@  int board_nand_init(struct nand_chip *this)
 {
 	struct mtd_info *mtd;
 	uint16_t tmp;
-	int err = 0;
 
 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
 	this->options |= NAND_USE_FLASH_BBT;
@@ -1287,5 +1284,5 @@  int board_nand_init(struct nand_chip *this)
 	this->ecc.layout = &nand_hw_eccoob;
 #endif
 	mxc_setup_config1();
-	return err;
+	return 0;
 }
diff --git u-boot-4d3c95f.orig/include/fsl_nfc.h u-boot-4d3c95f/include/fsl_nfc.h
index 6691e41..1c16c71 100644
--- u-boot-4d3c95f.orig/include/fsl_nfc.h
+++ u-boot-4d3c95f/include/fsl_nfc.h
@@ -166,5 +166,6 @@  struct fsl_nfc_regs {
 #define NFC_RST		(1 << 6)
 #define NFC_CE		(1 << 7)
 #define NFC_ONE_CYCLE	(1 << 8)
+#define NFC_FP_INT	(1 << 11)
 
 #endif /* __FSL_NFC_H */
diff --git u-boot-4d3c95f.orig/nand_spl/nand_boot_fsl_nfc.c u-boot-4d3c95f/nand_spl/nand_boot_fsl_nfc.c
index f437deb..b90f93e 100644
--- u-boot-4d3c95f.orig/nand_spl/nand_boot_fsl_nfc.c
+++ u-boot-4d3c95f/nand_spl/nand_boot_fsl_nfc.c
@@ -45,10 +45,10 @@  static void nfc_wait_ready(void)
 	writew(tmp, &nfc->config2);
 }
 
-void nfc_nand_init(void)
+static void nfc_nand_init(void)
 {
 #if defined(MXC_NFC_V1_1)
-	int ecc_per_page  = CONFIG_SYS_NAND_PAGE_SIZE / 512;
+	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 	int config1;
 
 	writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
@@ -57,12 +57,12 @@  void nfc_nand_init(void)
 	writew(0x2, &nfc->config);
 
 	/* hardware ECC checking and correct */
-	config1 = readw(&nfc->config1) | NFC_ECC_EN | 0x800;
+	config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_FP_INT;
 	/*
 	 * if spare size is larger that 16 bytes per 512 byte hunk
 	 * then use 8 symbol correction instead of 4
 	 */
-	if ((CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page) > 16)
+	if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
 		config1 &= ~NFC_4_8N_ECC;
 	else
 		config1 |= NFC_4_8N_ECC;
@@ -133,7 +133,7 @@  static void nfc_nand_data_output(void)
 	 * This NAND controller requires multiple input commands
 	 * for pages larger than 512 bytes.
 	 */
-	for (i = 1; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
+	for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
 		config1 = readw(&nfc->config1);
 		config1 |= NFC_ECC_EN | NFC_INT_MSK;
 		writew(config1, &nfc->config1);
@@ -171,7 +171,7 @@  static int nfc_read_page(unsigned int page_address, unsigned char *buf)
 	dst = (u32 *)buf;
 
 	/* main copy loop from NAND-buffer to SDRAM memory */
-	for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
+	for (i = 0; i < CONFIG_SYS_NAND_PAGE_SIZE / 4; i++) {
 		writel(readl(src), dst);
 		src++;
 		dst++;
@@ -230,7 +230,7 @@  static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
 	page = from / CONFIG_SYS_NAND_PAGE_SIZE;
 	i = 0;
 
-	while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
+	while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
 		if (nfc_read_page(page, buf) < 0)
 			return -1;